68f42be887
this is an brief hdmi driver which config with simple display parameter, const encoder input & output color format and 8bit color depth, and only 48KHz audio support. what's more to prevent TV have not show an right things before coreboot switch to kernel space, we have to add an terrible 2s delay to driver (2s come from test many times), cause we have to wait TV to respond (we got no flag to check whether it is ready). BUG=chrome-os-partner:40337 TEST=Booted Veyron Jerry and display normal BRANCH=None Change-Id: Icd33467e95de6219e1b614616f0112afc52097b6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7e5b699aff75a579116aae63d858c834b2f648e8 Original-Change-Id: Iedc87c011c5b62ce5f16a296dd9c3e0c2eaba59b Original-Signed-off-by: Yakir Yang <ykk@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/272565 Original-Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Reviewed-on: http://review.coreboot.org/10625 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
35 lines
1 KiB
C
35 lines
1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Rockchip Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#ifndef __SOC_ROCKCHIP_RK3288_CHIP_H__
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#define __SOC_ROCKCHIP_RK3288_CHIP_H__
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#include <soc/gpio.h>
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struct soc_rockchip_rk3288_config {
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u32 vop_id;
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gpio_t lcd_bl_pwm_gpio;
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gpio_t lcd_bl_en_gpio;
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u32 bl_power_on_udelay;
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u32 bl_pwm_to_enable_udelay;
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u32 framebuffer_bits_per_pixel;
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u32 vop_mode;
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};
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#endif /* __SOC_ROCKCHIP_RK3288_CHIP_H__ */
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