Simon Yang df520855ca soc/intel/jsl: Add disable_external_bypass_vr config ... This dev tree config controls the Vnn/Vcc1P05 bypass mode for Jasperlake. BUG=b:191691430 BRANCH=dedede TEST=Build fw and confirm FSP setting are set properly by log Signed-off-by: Simon Yang <simon1.yang@intel.com> Change-Id: I10bc203d3fed32ab65f325978426b7d0fca6f392 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55744 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jamie Chen <jamie.chen@intel.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2021-07-28 11:40:45 +00:00
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amd	soc/amd/common/block/acpimmio: add Kconfig option for biosram accessors	2021-07-26 19:34:20 +00:00
cavium
example	src: Introduce ARCH_ALL_STAGES_X86	2021-07-02 08:19:10 +00:00
intel	soc/intel/jsl: Add disable_external_bypass_vr config	2021-07-28 11:40:45 +00:00
mediatek	soc/mediatek/mt8195: modify mt6360 interface	2021-07-21 15:46:53 +00:00
nvidia	soc/nvidia/tegra124: Increase bootblock size	2021-07-26 05:05:41 +00:00
qualcomm	sc7280: Increased CBFS_MCACHE size	2021-07-25 05:06:59 +00:00
rockchip
samsung	commonlib/region: Turn addrspace_32bit into a more official API	2021-04-21 02:06:26 +00:00
sifive
ti	soc/ti/am335x/mmc.c: Fix memset length argument	2021-04-04 09:58:26 +00:00
ucb