cb28d649ea
A new ChromeOS automated test will be introduced to check the cbmem log of diagnostic boot mode. Because the diagnostic boot does not allow booting into kernel, the test must perform AP reset and then check the cbmem log afterwards. However, the memory content might not be written back to memory (from CPU cache) during AP reset because of the cache snooping mechanism on x86. Hence, some API to flush cache is needed. Implement dcache_* to allow flushing cache proactively in x86. To avoid unnecessary flush, check dma_coherent before calling dcache_* functions, which will be always true in x86. Therefore, this change won't affect the original functionality. BUG=b:190026346 TEST=FW_NAME=primus emerge-brya libpayload Cq-Depend: chromium:3841252 Signed-off-by: Hsin-Te Yuan <yuanhsinte@google.com> Change-Id: I622d8b1cc652cbe477954a900885d12e6494d94d Reviewed-on: https://review.coreboot.org/c/coreboot/+/66578 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
51 lines
2.1 KiB
C
51 lines
2.1 KiB
C
/*
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*
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* Copyright 2013 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* cache.h: Cache maintenance API for x86
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*/
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#ifndef __ARCH_CACHE_H__
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#define __ARCH_CACHE_H__
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#include <stddef.h>
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#include <stdint.h>
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/* returns number of bytes per cache line */
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unsigned int dcache_line_bytes(void);
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void dcache_invalidate_all(void);
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void dcache_clean_invalidate_all(void);
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void dcache_clean_all(void);
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void dcache_clean_by_mva(void const *addr, size_t len);
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void dcache_invalidate_by_mva(void const *addr, size_t len);
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void dcache_clean_invalidate_by_mva(void const *addr, size_t len);
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/* NOOPs mirroring ARM's cache API, since x86 devices usually cache snoop */
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#define dmb()
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#define dsb()
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#define cache_sync_instructions()
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#endif
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