Arthur Heymans 7eb0157fca device/dram/ddr2.c: Decoding byte[12] bit7 as self refresh flag ... "Annex J: Serial Presence Detects for DDR2 SDRAM (Revision 1.3)" note 4 says bit7 of byte 12 indicates whether the assembly supports self refresh. This patch decodes this and modifies decoding tRR accordingly. Change-Id: I091121a5d08159cea4befdedb5f3a92ce132c6e5 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/21620 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>		2017-09-22 18:31:03 +00:00
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ddr2.h	device/dram/ddr2.c: Decoding byte[12] bit7 as self refresh flag	2017-09-22 18:31:03 +00:00
ddr3.h	device/dram/ddr3.h: Add brackets around macro	2017-06-22 15:21:49 +00:00