Patrick Georgi e135ac5a7e Remove AMD special case for LAPIC based udelay() ... - Optionally override FSB clock detection in generic LAPIC code with constant value. - Override on AMD Model fxx, 10xxx, agesa CPUs with 200MHz - compile LAPIC code for romstage, too - Remove #include ".../apic_timer.c" in AMD based mainboards - Remove custom udelay implementation from intel northbridges' romstages Future work: - remove the compile time special case (requires some cpuid based switching) - drop northbridge udelay implementations (i945, i5000) if not required anymore (eg. can SMM use the LAPIC timer?) Change-Id: I25bacaa2163f5e96ab7f3eaf1994ab6899eff054 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1618 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2012-11-27 23:51:52 +01:00
..
acpi	Unify Local APIC address definitions	2012-03-08 15:39:05 +01:00
acpi_tables.c	Refactor some alignment handling	2012-04-20 21:18:02 +02:00
cmos.layout
devicetree.cb
dsdt.asl
fadt.c	Get rid of hard coded strings in ACPI tables	2012-11-09 19:03:45 +01:00
get_bus_conf.c	Clean up #ifs	2012-05-08 00:34:34 +02:00
irq_tables.c
Kconfig	Drop unneeded BOARD_HAS_FADT option	2012-11-16 01:13:02 +01:00
mainboard.c	Drop redundant CHIP_NAME in mainboard.c	2012-11-06 21:59:21 +01:00
mb_sysconf.h
mptable.c	Clean up #ifs	2012-05-08 00:34:34 +02:00
resourcemap.c
romstage.c	Remove AMD special case for LAPIC based udelay()	2012-11-27 23:51:52 +01:00
ssdt2.asl
ssdt3.asl
ssdt4.asl
ssdt5.asl