coreboot-kgpe-d16/util/crossgcc/patches/binutils-2.28_mips-gold.patch
Iru Cai 03353de80b buildgcc: Update GCC, Binutils, GMP, MPFR, GDB, IASL and LLVM
- GCC gets updated from 5.2.0 to 6.3.0:
gcc-6.3.0_riscv.patch is a diff between 5fcb8c4 and 173684b in
riscv-gcc, and it needs gcc-6.3.0_memmodel.patch.

- Binutils goes from 2.26.1 to 2.28:
There is a build error for MIPS gold so I add patch for it.

- GMP gets a bump from 6.1.0 to 6.1.2
- MPFR is updated from 3.1.4 to 3.1.5
- GDB is upgraded from 6.1.1 to 6.1.2
- IASL is changed from 20160831 to 20161222
- LLVM is changed from 3.8.0 to 3.9.1

Change-Id: I20fea838d798c430d8c4d2cc6b07614d967c60c5
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/17189
Tested-by: build bot (Jenkins)
2017-03-05 18:35:18 +01:00

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Diff

diff -urN binutils-2.27.orig/gold/configure.tgt binutils-2.27/gold/configure.tgt
--- binutils-2.27.orig/gold/configure.tgt 2016-08-03 15:36:53.000000000 +0800
+++ binutils-2.27/gold/configure.tgt 2016-10-29 19:28:56.140587026 +0800
@@ -157,6 +157,7 @@
targ_obj=mips
targ_machine=EM_MIPS_RS3_LE
targ_size=32
+ targ_extra_size=64
targ_big_endian=false
targ_extra_big_endian=true
;;