No description
e30e4e7efa
I always thought the support for multiple logical SCSI units in the USB mass storage class was a dead feature. Turns out that it's actually used by SD card readers that provide multiple slots (e.g. one regular sized and one micro-SD). Implementing perfect support for that would require a major redesign of the whole MSC stack, since the one device -> one disk assumption is deeply embedded in our data structures. Instead, this patch implements a poor man's LUN support that will just cycle through all available LUNs (in multiple calls to usb_msc_poll()) until it finds a connected device. This should be reasonable enough to allow these card readers to be usable while only requiring superficial changes. Also removes the unused 'protocol' attribute of usb_msc_inst_t. BRANCH=rambi?,nyan BUG=chrome-os-partner:28437 TEST=Alternatively plug an SD or micro-SD card (or both) into my card reader, confirm that one of them is correctly detected at all times. Original-Change-Id: I3df4ca88afe2dcf7928b823aa2a73c2b0f599cf2 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/198101 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 960534a20e4334772c29355bb0d310b3f41b31ee) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I39909fc96e32c9a5d76651d91c2b5c16c89ace9e Reviewed-on: http://review.coreboot.org/7904 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> |
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3rdparty@a8b0c52850 | ||
documentation | ||
payloads | ||
src | ||
util | ||
.gitignore | ||
.gitmodules | ||
.gitreview | ||
COPYING | ||
Makefile | ||
Makefile.inc | ||
README | ||
toolchain.inc |
------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload. With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required. coreboot was formerly known as LinuxBIOS. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. See http://www.coreboot.org/Payloads for a list of supported payloads. Supported Hardware ------------------ coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * gcc / g++ * make Optional: * doxygen (for generating/viewing documentation) * iasl (for targets with ACPI support) * gdb (for better debugging facilities on some targets) * ncurses (for 'make menuconfig') * flex and bison (for regenerating parsers) Building coreboot ----------------- Please consult http://www.coreboot.org/Build_HOWTO for details. Testing coreboot Without Modifying Your Hardware ------------------------------------------------ If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. Please see http://www.coreboot.org/QEMU for details. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.