499ccbe41c
Change-Id: I369c2063a5e57d1fd33d3c6bf7c715c22970fc32 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16772 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
102 lines
2.5 KiB
C
102 lines
2.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef EMERALDLAKE2_GPIO_H
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#define EMERALDLAKE2_GPIO_H
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#include <southbridge/intel/common/gpio.h>
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const struct pch_gpio_set1 pch_gpio_set1_mode = {
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.gpio0 = GPIO_MODE_GPIO,
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.gpio1 = GPIO_MODE_GPIO,
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.gpio3 = GPIO_MODE_GPIO,
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.gpio5 = GPIO_MODE_GPIO,
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.gpio6 = GPIO_MODE_GPIO,
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.gpio7 = GPIO_MODE_GPIO,
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.gpio8 = GPIO_MODE_GPIO,
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.gpio9 = GPIO_MODE_GPIO,
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.gpio12 = GPIO_MODE_GPIO,
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.gpio15 = GPIO_MODE_GPIO,
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.gpio21 = GPIO_MODE_GPIO,
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.gpio22 = GPIO_MODE_GPIO,
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.gpio24 = GPIO_MODE_GPIO,
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.gpio27 = GPIO_MODE_GPIO,
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.gpio28 = GPIO_MODE_GPIO,
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};
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const struct pch_gpio_set1 pch_gpio_set1_direction = {
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.gpio0 = GPIO_DIR_INPUT,
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.gpio3 = GPIO_DIR_INPUT,
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.gpio5 = GPIO_DIR_INPUT,
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.gpio7 = GPIO_DIR_INPUT,
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.gpio8 = GPIO_DIR_INPUT,
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.gpio9 = GPIO_DIR_INPUT,
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.gpio12 = GPIO_DIR_INPUT,
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.gpio15 = GPIO_DIR_INPUT,
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.gpio21 = GPIO_DIR_INPUT,
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.gpio22 = GPIO_DIR_INPUT,
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.gpio27 = GPIO_DIR_INPUT,
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};
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const struct pch_gpio_set1 pch_gpio_set1_level = {
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};
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const struct pch_gpio_set1 pch_gpio_set1_invert = {
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};
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const struct pch_gpio_set2 pch_gpio_set2_mode = {
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.gpio36 = GPIO_MODE_GPIO,
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.gpio48 = GPIO_MODE_GPIO,
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.gpio57 = GPIO_MODE_GPIO,
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.gpio60 = GPIO_MODE_GPIO,
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};
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const struct pch_gpio_set2 pch_gpio_set2_direction = {
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.gpio48 = GPIO_DIR_INPUT,
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.gpio57 = GPIO_DIR_INPUT,
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};
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const struct pch_gpio_set2 pch_gpio_set2_level = {
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};
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const struct pch_gpio_set3 pch_gpio_set3_mode = {
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};
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const struct pch_gpio_set3 pch_gpio_set3_direction = {
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};
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const struct pch_gpio_set3 pch_gpio_set3_level = {
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};
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const struct pch_gpio_map mainboard_gpio_map = {
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.set1 = {
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.mode = &pch_gpio_set1_mode,
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.direction = &pch_gpio_set1_direction,
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.level = &pch_gpio_set1_level,
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.invert = &pch_gpio_set1_invert,
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},
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.set2 = {
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.mode = &pch_gpio_set2_mode,
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.direction = &pch_gpio_set2_direction,
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.level = &pch_gpio_set2_level,
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},
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.set3 = {
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.mode = &pch_gpio_set3_mode,
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.direction = &pch_gpio_set3_direction,
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.level = &pch_gpio_set3_level,
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},
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};
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#endif
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