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Arthur Heymans e4459b3961 soc/intel/lpc: Set up default LPC decode ranges
Intel LPC devices have generic and fix IO decode ranges. This CL is
smarter about using generic ones, by using the fixed ones first.

Change-Id: Ifd98bcc639ee08d068956a33b0e12cc70211ca2d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65097
Reviewed-by: Marvin Drees <marvin.drees@9elements.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-12 22:44:44 +00:00
3rdparty 3rdparty/amd_blobs: Advance submodule pointer 2022-06-10 21:22:11 +00:00
Documentation util, Documentation: Run util_readme.sh to regen util.md 2022-06-07 15:49:27 +00:00
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configs nb/intel/gm45: Enable 64bit support 2022-05-13 10:57:41 +00:00
payloads payloads/tianocore: Allow custom build parameters 2022-06-09 16:58:39 +00:00
spd spd/lp5: Add SPD for Micron MT62F1G32D4DS 2022-06-03 19:46:09 +00:00
src soc/intel/lpc: Set up default LPC decode ranges 2022-06-12 22:44:44 +00:00
tests lib: Check for non-existent DIMMs in check_if_dimm_changed 2022-04-20 06:57:21 +00:00
util crossgcc/gnat.patch: Add additional gnatlib object files 2022-06-10 14:09:32 +00:00
.checkpatch.conf checkpatch.conf: Disable gerrit change ID for coreboot 2022-04-12 20:39:50 +00:00
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.gitignore Treewide: Remove doxygen config files and targets 2022-05-28 01:24:51 +00:00
.gitmodules tests: update CMocka to stable-1.1 2022-04-19 13:00:36 +00:00
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MAINTAINERS MAINTAINERS: Add Maintainers for Intel Elkhart Lake SoC 2022-06-05 21:07:26 +00:00
Makefile Treewide: Remove doxygen config files and targets 2022-05-28 01:24:51 +00:00
Makefile.inc cbfstool: Expand CBFS verification validity check 2022-06-07 12:57:25 +00:00
README.md Treewide: Remove doxygen config files and targets 2022-05-28 01:24:51 +00:00
gnat.adc
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README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.