coreboot-kgpe-d16/src/northbridge
Xavi Drudis Ferran e485aa496b Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage
handling for Fam 10 in SVI mode.

Contemplate the possibility of nbCofVidUpdate not being
defined, trying to get closer to BKDG

Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6399 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-28 02:33:59 +00:00
..
amd Improving BKDG implementation of P-states, 2011-02-28 02:33:59 +00:00
intel [i945] Add SPD adress mapping 2011-02-21 09:39:17 +00:00
via __PRE_RAM__ is defined by the makefile 2010-12-27 13:30:39 +00:00
Kconfig Drop remainders of PPC port 2009-10-28 19:40:46 +00:00
Makefile.inc Drop remainders of PPC port 2009-10-28 19:40:46 +00:00