e24f97c081
There's no good reason to use values smaller than 2 GiB here. Well, it increases available DRAM in 32-bit space. However, as this is a 64-bit platform, it's highly unlikely that 32-bit limitations would cause any issues anymore. It's more likely to have the allocator give up because memory-mapped resources in 32-bit space don't fit within the specified MMIO size, which can easily occur when using a discrete graphics card. Change-Id: I6cdce5f56bc94cca7065ee3e38af60d1de66e45c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52070 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
91 lines
2.4 KiB
Text
91 lines
2.4 KiB
Text
## SPDX-License-Identifier: GPL-2.0-only
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chip northbridge/intel/ironlake
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# IGD Displays
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register "gfx" = "GMA_STATIC_DISPLAYS(0)"
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register "gpu_dp_b_hotplug" = "0x04"
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register "gpu_dp_c_hotplug" = "0x04"
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register "gpu_dp_d_hotplug" = "0x04"
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# Enable Panel as LVDS and configure power delays
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register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
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register "gpu_panel_power_cycle_delay" = "6"
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register "gpu_panel_power_up_delay" = "300"
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register "gpu_panel_power_down_delay" = "300"
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register "gpu_panel_power_backlight_on_delay" = "3000"
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register "gpu_panel_power_backlight_off_delay" = "3000"
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register "gpu_cpu_backlight" = "0x58d"
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register "gpu_pch_backlight" = "0x061a061a"
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device cpu_cluster 0 on
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chip cpu/intel/model_2065x
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device lapic 0 on end
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end
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end
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device domain 0 on
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device pci 00.0 on # Host bridge
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subsystemid 0x1025 0x0379
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end
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device pci 01.0 off end # PEG
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device pci 02.0 on # VGA controller
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subsystemid 0x1025 0x0379
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end
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chip southbridge/intel/ibexpeak
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# GPI routing
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# 0 No effect (default)
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# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
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# 2 SCI (if corresponding GPIO_EN bit is also set)
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register "gpi7_routing" = "2"
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register "gpi8_routing" = "2"
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register "sata_port_map" = "0x11"
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register "gpe0_en" = "0x01800046"
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register "alt_gp_smi_en" = "0x0000"
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register "gen1_dec" = "0x040069"
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device pci 16.0 off end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R, only management boot
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device pci 16.3 off end # Management Engine KT
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device pci 19.0 off end # Ethernet
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device pci 1a.0 on # USB2 EHCI
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subsystemid 0x1025 0x0379
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end
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device pci 1b.0 on # Audio Controller
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subsystemid 0x1025 0x0379
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end
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device pci 1c.0 on end # PCIe Port #1
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device pci 1c.1 on end # PCIe Port #2
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device pci 1c.2 off end
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device pci 1c.3 off end
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device pci 1c.4 off end
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device pci 1c.5 off end
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device pci 1c.6 off end
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device pci 1c.7 off end
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device pci 1d.0 on # USB2 EHCI
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subsystemid 0x1025 0x0379
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end
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device pci 1e.0 on end # PCI 2 PCI bridge
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device pci 1f.0 on # PCI-LPC bridge
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subsystemid 0x1025 0x0379
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end
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device pci 1f.2 on # IDE/SATA
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subsystemid 0x1025 0x0379
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end
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device pci 1f.3 on # SMBUS
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subsystemid 0x1025 0x0379
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end
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device pci 1f.4 off end
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device pci 1f.5 off end
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device pci 1f.6 off end
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end
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end
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end
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