coreboot-kgpe-d16/src/mainboard/emulation/spike-riscv
Philipp Hug 934ae21b52 mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.
TEST=Set MAX_CPUS=2 and run qemu with -smp 2

Signed-off-by: Philipp Hug <philipp@hug.cx>
Change-Id: I94fb25fad103e3cb5db676eb4caead11d54ae0ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35246
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Xiang Wang <merle@hardenedlinux.org>
2019-12-06 15:09:48 +00:00
..
board_info.txt
clint.c mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike. 2019-12-06 15:09:48 +00:00
devicetree.cb
Kconfig Kconfig: comply to Linux 5.3's Kconfig language rules 2019-11-23 20:09:56 +00:00
Kconfig.name Kconfig: comply to Linux 5.3's Kconfig language rules 2019-11-23 20:09:56 +00:00
mainboard.c
Makefile.inc mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike. 2019-12-06 15:09:48 +00:00
memlayout.ld
rom_media.c
romstage.c mb/emulation/*-riscv: Initialize cbmem in romstage 2019-11-01 19:41:51 +00:00
uart.c