coreboot-kgpe-d16/src
Vadim Bendebury 052b7fec07 Enable publishing of board ID where supported
These boards are supposed to be able to determine the board ID at run
time based on GPIO settings.

BUG=chrome-os-partner:30489
TEST=verified that all boards build. Checked that storm proto0 reports
     board ID of 0 on the console

Original-Change-Id: Iadd758a799d69e1e34579d7d495378856b64c45b
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210119
(cherry picked from commit f4d41ddf906c1bf0d10da38011998fa0a630c332)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I0d5f94d3428157a70f0a9d711b57432e3f796733
Reviewed-on: http://review.coreboot.org/8722
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-23 17:20:24 +01:00
..
arch mips: fix bootblock stack definitions 2015-03-23 15:34:36 +01:00
console console: Allow bootblock console on MIPS 2015-03-23 15:35:06 +01:00
cpu imgtec/danube: Add support for ImgTec Danube SoC 2015-03-21 16:57:08 +01:00
device PCIe: Revise L1 Sub-State support 2015-03-23 13:11:18 +01:00
drivers verstage should include the CBFS SPI wrapper, when configured 2015-03-20 16:04:52 +01:00
ec chromeec: use stopwatch API 2015-03-21 17:00:26 +01:00
include Publish the board ID value in coreboot table, when configured 2015-03-23 17:20:13 +01:00
lib Publish the board ID value in coreboot table, when configured 2015-03-23 17:20:13 +01:00
mainboard Enable publishing of board ID where supported 2015-03-23 17:20:24 +01:00
northbridge cpu/amd/model_10xxx: Add support for early cbmem 2015-03-19 08:28:43 +01:00
soc ipq806x: implement GPIO API 2015-03-23 17:20:07 +01:00
southbridge CBMEM: Add LATE_CBMEM_INIT guards 2015-03-19 06:17:07 +01:00
superio superio: ite8772f: Exit extemp busy state 2015-03-21 08:44:28 +01:00
vendorcode loaders: add program_loading.h header file 2015-03-20 19:25:29 +01:00
Kconfig Enable publishing of board ID where supported 2015-03-23 17:20:24 +01:00