coreboot-kgpe-d16/src/mainboard/google/octopus/smihandler.c
Furquan Shaikh d1d85e8849 mb/google/octopus: Enable logging of EC wake sources in S0ix
This change adds GSMI callback elog_gsmi_cb_mainboard_log_wake_source
to enable logging of EC wake events in S0ix.

BUG=b:79449585
TEST=Verified that S0ix entry/exit events are added to eventlog:

=========== Lid open ================
62 | 2018-06-25 14:02:36 | S0ix Enter
63 | 2018-06-25 14:02:56 | S0ix Exit
64 | 2018-06-25 14:03:26 | Wake Source | GPE # | 15
65 | 2018-06-25 14:03:32 | Wake Source | GPE # | 65
66 | 2018-06-25 14:03:37 | EC Event | Lid Open

Change-Id: Icc8cd3624966ff66d2cf189871e452cf650cec40
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/27235
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-26 20:40:27 +00:00

62 lines
1.6 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright 2018 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/acpi.h>
#include <baseboard/variants.h>
#include <cpu/x86/smm.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/smm.h>
#include <elog.h>
#include <intelblocks/smihandler.h>
#include <soc/pm.h>
#include <soc/gpio.h>
#include <variant/ec.h>
#include <variant/gpio.h>
void mainboard_smi_gpi_handler(const struct gpi_status *sts)
{
if (gpi_status_get(sts, EC_SMI_GPI))
chromeec_smi_process_events();
}
void mainboard_smi_sleep(u8 slp_typ)
{
const struct pad_config *pads;
size_t num;
pads = variant_sleep_gpio_table(&num, slp_typ);
gpio_configure_pads(pads, num);
chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
MAINBOARD_EC_S5_WAKE_EVENTS);
}
int mainboard_smi_apmc(u8 apmc)
{
chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
MAINBOARD_EC_SMI_EVENTS);
return 0;
}
void mainboard_smi_espi_handler(void)
{
chromeec_smi_process_events();
}
void elog_gsmi_cb_mainboard_log_wake_source(void)
{
google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS |
MAINBOARD_EC_S0IX_WAKE_EVENTS);
}