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Jacob Garber e7a126fbc2 drivers/ipmi: Fix buffer double-free
If reading the data for the asset_tag fails, that buffer should be
freed, not the one for serial_number.

Original-Change-Id: I2ecaf7fd0f23f2fb5a6aa0961c7e17fff04847f4
Original-Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Original-Found-by: Coverity CID 1419481, 1419485
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/39378
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
(cherry picked from commit f8cd291344)

Change-Id: I4947ba4578b5a41a30e487f5572412cb6ed79a1b
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55768
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-25 04:11:57 +00:00
3rdparty 3rdparty/intel-microcode: Update to 2020118 release 2021-02-22 07:35:05 +00:00
Documentation Documentation/releases: Finalize 4.11, start 4.12 2019-11-19 14:58:22 +00:00
LICENSES LICENSES: Add licenses used in the coreboot repo 2019-10-30 08:23:51 +00:00
configs security/intel/stm: Add STM support 2021-02-22 07:33:43 +00:00
payloads mmio: Fix buffer_to_fifo32() order of arguments 2019-11-19 06:17:04 +00:00
src drivers/ipmi: Fix buffer double-free 2021-06-25 04:11:57 +00:00
util util/chromeos: Indent code blocks instead of using ``` 2019-11-19 13:28:25 +00:00
.checkpatch.conf .checkpatch.conf: Ignore a few more warnings 2018-08-13 12:23:24 +00:00
.clang-format lint/clang-format: set to 96 chars per line 2019-06-13 20:14:00 +00:00
.editorconfig Add .editorconfig file 2019-09-10 12:52:18 +00:00
.gitignore .gitignore: Add an exception for Kconfig.debug 2019-10-22 12:57:32 +00:00
.gitmodules .gitmodules: Update intel-microcode submodule to track branch=main 2021-06-10 05:39:18 +00:00
.gitreview
AUTHORS Updated AUTHORS file for src/drivers 2019-10-22 12:55:27 +00:00
COPYING
MAINTAINERS MAINTAINERS: Add supermicro/x11-lga1151-series 2019-10-17 19:54:15 +00:00
Makefile Makefile.inc: Add a class 'all' to link files in all stage except SMM 2019-10-30 08:26:54 +00:00
Makefile.inc Makefile.inc: Ignore _HID & _ADR conflicts in Broadwell & Lynxpoint 2020-03-04 15:50:11 +00:00
README.md README.md: Remove link to deprecated wiki 2019-11-16 20:39:55 +00:00
gnat.adc gnat.adc: Do not generate assertion code for Refined_Post 2016-10-29 01:33:31 +02:00
toolchain.inc Split MAYBE_STATIC to _BSS and _NONZERO variants 2019-08-26 20:56:29 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.