82651463e3
Based on the Intel G41 chipset, ICH7 southbridge, and IT8720F Super I/O. Tested, working: * Booting Linux 4.11.3 and Windows 8.1 from USB and HDD * Resume from S3 (Linux and Windows) * Native raminit (DDR2-800) * Native graphics init (SeaBIOS, Linux) * Graphics init with VGA BIOS (SeaBIOS, Windows) * PCI-E x16 PEG slot, PCI-E x1 slot from southbridge * Realtek ALC888 HD Audio (including front panel and jack detection) * Realtek R8168 Gigabit LAN * Both SATA ports * USB 1.1 and 2.0 devices (keyboard, mass storage) * PC speaker beep * COM header * Super I/O Environment controller (temps, voltage, fans) * PS/2 keyboard and mouse * Flashing with `flashrom -p internal` * 1MiB and 2MiB SPI flash chips * CMOS gfx_uma_size Appears, OS driver loads, but otherwise untested: * IrDA header * CIR header * TPM header Untested: * S/PDIF digital audio Tested, known broken: * CMOS power_on_after_fail * USB keyboard in secondary payloads Change-Id: Ifc4c8935b1a11e55f4bf6cfa484a8a8d09b1adda Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-on: https://review.coreboot.org/20027 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
121 lines
3.2 KiB
C
121 lines
3.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Arthur Heymans <arthur@aheymans.xyz>
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* Copyright (C) 2017 Samuel Holland <samuel@sholland.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <southbridge/intel/common/gpio.h>
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static const struct pch_gpio_set1 pch_gpio_set1_mode = {
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.gpio0 = GPIO_MODE_GPIO,
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.gpio6 = GPIO_MODE_GPIO,
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.gpio7 = GPIO_MODE_GPIO,
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.gpio8 = GPIO_MODE_GPIO,
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.gpio9 = GPIO_MODE_GPIO,
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.gpio10 = GPIO_MODE_GPIO,
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.gpio12 = GPIO_MODE_GPIO,
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.gpio13 = GPIO_MODE_GPIO,
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.gpio14 = GPIO_MODE_GPIO,
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.gpio15 = GPIO_MODE_GPIO,
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.gpio16 = GPIO_MODE_GPIO,
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.gpio18 = GPIO_MODE_GPIO,
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.gpio20 = GPIO_MODE_GPIO,
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.gpio24 = GPIO_MODE_GPIO,
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.gpio25 = GPIO_MODE_GPIO,
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.gpio26 = GPIO_MODE_GPIO,
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.gpio27 = GPIO_MODE_GPIO,
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.gpio28 = GPIO_MODE_GPIO,
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};
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static const struct pch_gpio_set1 pch_gpio_set1_direction = {
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.gpio0 = GPIO_DIR_INPUT,
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.gpio6 = GPIO_DIR_INPUT,
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.gpio7 = GPIO_DIR_INPUT,
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.gpio8 = GPIO_DIR_INPUT,
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.gpio9 = GPIO_DIR_INPUT,
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.gpio10 = GPIO_DIR_INPUT,
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.gpio12 = GPIO_DIR_INPUT,
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.gpio13 = GPIO_DIR_INPUT,
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.gpio14 = GPIO_DIR_INPUT,
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.gpio15 = GPIO_DIR_OUTPUT,
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.gpio16 = GPIO_DIR_OUTPUT,
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.gpio18 = GPIO_DIR_OUTPUT,
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.gpio20 = GPIO_DIR_OUTPUT,
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.gpio24 = GPIO_DIR_OUTPUT,
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.gpio25 = GPIO_DIR_OUTPUT,
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.gpio26 = GPIO_DIR_OUTPUT,
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.gpio27 = GPIO_DIR_OUTPUT,
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.gpio28 = GPIO_DIR_OUTPUT,
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};
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static const struct pch_gpio_set1 pch_gpio_set1_level = {
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.gpio15 = GPIO_LEVEL_HIGH,
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.gpio16 = GPIO_LEVEL_LOW,
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.gpio18 = GPIO_LEVEL_HIGH,
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.gpio20 = GPIO_LEVEL_HIGH,
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.gpio24 = GPIO_LEVEL_HIGH,
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.gpio25 = GPIO_LEVEL_HIGH,
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.gpio26 = GPIO_LEVEL_LOW,
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.gpio27 = GPIO_LEVEL_LOW,
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.gpio28 = GPIO_LEVEL_LOW,
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};
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static const struct pch_gpio_set1 pch_gpio_set1_blink = {
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};
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static const struct pch_gpio_set1 pch_gpio_set1_invert = {
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.gpio0 = GPIO_INVERT,
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.gpio6 = GPIO_INVERT,
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.gpio7 = GPIO_INVERT,
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.gpio8 = GPIO_INVERT,
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.gpio12 = GPIO_INVERT,
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.gpio13 = GPIO_INVERT,
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.gpio14 = GPIO_INVERT,
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};
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static const struct pch_gpio_set2 pch_gpio_set2_mode = {
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.gpio32 = GPIO_MODE_GPIO,
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.gpio33 = GPIO_MODE_GPIO,
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.gpio34 = GPIO_MODE_GPIO,
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.gpio38 = GPIO_MODE_GPIO,
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.gpio39 = GPIO_MODE_GPIO,
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};
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static const struct pch_gpio_set2 pch_gpio_set2_direction = {
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.gpio32 = GPIO_DIR_OUTPUT,
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.gpio33 = GPIO_DIR_OUTPUT,
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.gpio34 = GPIO_DIR_OUTPUT,
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.gpio38 = GPIO_DIR_INPUT,
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.gpio39 = GPIO_DIR_INPUT,
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};
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static const struct pch_gpio_set2 pch_gpio_set2_level = {
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.gpio32 = GPIO_LEVEL_HIGH,
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.gpio33 = GPIO_LEVEL_HIGH,
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.gpio34 = GPIO_LEVEL_HIGH,
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};
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const struct pch_gpio_map mainboard_gpio_map = {
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.set1 = {
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.mode = &pch_gpio_set1_mode,
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.direction = &pch_gpio_set1_direction,
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.level = &pch_gpio_set1_level,
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.blink = &pch_gpio_set1_blink,
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.invert = &pch_gpio_set1_invert,
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},
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.set2 = {
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.mode = &pch_gpio_set2_mode,
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.direction = &pch_gpio_set2_direction,
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.level = &pch_gpio_set2_level,
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},
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};
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