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Duncan Laurie e8189b7426 acpi/soundwire: Add functions to generate SoundWire properties
This change uses the previously added SoundWire definitions to provide
functions that generate ACPI Device Properties for SoundWire
controllers and codecs.

A SoundWire controller driver should populate
`struct soundwire_controller` and pass it to
soundwire_gen_controller().  This will add all of the defined master
links provided by the controller.

A SoundWire codec driver should populate the necessary members in
struct soundwire_codec and pass it to soundwire_gen_codec().
Several properties are optional and depend on whether the codec itself
supports certain features and behaviors.

The goal of this interface is to handle all of the properties defined
in the SoundWire Discovery and Configuration Specification Version
1.0 so that controller and codec drivers do not need to all have code
for writing standard properties.

Both of these functions also provide a callback method for adding
custom properties that are not defined by the SoundWire DisCo
Specification.  These properties may be required by OS drivers but are
outside of the scope of the SoundWire specification itself.

This code is tested with controller, codec, and mainboard
implementations in subsequent commits.

BUG=b:146482091

Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: Ib185eaacf3c4914087497ed65479a772c155502b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40884
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-05-21 08:04:02 +00:00
3rdparty 3rdparty/libgfxinit: Update submodule pointer 2020-05-20 23:37:31 +00:00
Documentation Revert "mainboard/lenovo/x230: Add ThinkPad x230s as a variant" 2020-05-21 02:50:08 +00:00
LICENSES LICENSES: Fix up retained copyright lines 2020-05-11 19:49:38 +00:00
configs mb/dell/optiplex_9010: Add Dell OptiPlex 9010 SFF support 2020-05-16 17:38:46 +00:00
payloads libpayload: Fix definitions of minimum integer values 2020-05-18 07:34:55 +00:00
src acpi/soundwire: Add functions to generate SoundWire properties 2020-05-21 08:04:02 +00:00
tests tests: Add region-test for rdev API 2020-05-19 03:22:04 +00:00
util util/apcb: Add apcb_edit tool 2020-05-18 07:40:47 +00:00
.checkpatch.conf
.clang-format lint/clang-format: set to 96 chars per line 2019-06-13 20:14:00 +00:00
.editorconfig Add .editorconfig file 2019-09-10 12:52:18 +00:00
.gitignore cbfstool: Build vboot library 2020-03-23 08:34:23 +00:00
.gitmodules submodules: Add 3rdparty/amd_blobs 2019-10-31 12:28:38 +00:00
.gitreview
AUTHORS AUTHORS, util/: Drop individual copyright notices 2020-05-09 21:21:32 +00:00
COPYING
MAINTAINERS MAINTAINERS: Add entry for mb/ocp/tiogapass 2020-05-11 08:34:49 +00:00
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gnat.adc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
toolchain.inc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.