6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
44 lines
1.1 KiB
C
44 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <bootblock_common.h>
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#include <device/pci_ops.h>
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#include <southbridge/intel/i82801gx/i82801gx.h>
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#include <northbridge/intel/pineview/pineview.h>
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#include <superio/winbond/w83627thg/w83627thg.h>
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#include <superio/winbond/common/winbond.h>
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#define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1)
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void bootblock_mainboard_early_init(void)
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{
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/* Disable Serial IRQ */
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pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0x00);
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/* Decode range */
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pci_or_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, 0x0010);
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pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN
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| CNF2_LPC_EN | KBC_LPC_EN | COMA_LPC_EN
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| COMB_LPC_EN);
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pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN2_DEC, 0x7c0291);
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winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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}
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void mb_pirq_setup(void)
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{
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/* dev irq route register */
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RCBA16(D31IR) = 0x0132;
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RCBA16(D30IR) = 0x0146;
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RCBA16(D29IR) = 0x0237;
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RCBA16(D28IR) = 0x3201;
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RCBA16(D27IR) = 0x0146;
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/* Does not belong here, but is it needed? */
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RCBA32(FD) |= FD_INTLAN;
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}
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void get_mb_spd_addrmap(u8 *spd_addrmap)
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{
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spd_addrmap[0] = 0x50;
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spd_addrmap[1] = 0x51;
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}
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