coreboot-kgpe-d16/targets/amd/db800/Config.lb
Stefan Reinauer e989be26e6 BIOS_SPEW is log level 9. There is nothing beyound that line.
(Thus the patch is trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-15 12:26:12 +00:00

49 lines
1.5 KiB
Text

##
## This file is part of the coreboot project.
##
## Copyright (C) 2007 Advanced Micro Devices, Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
# Config file for the AMD Geode LX/5536 DB800 platform.
target db800
mainboard amd/db800
# HACK to get the right TSC support.
option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
# Leave 36k for VSA.
option ROM_SIZE=512*1024-36*1024
# option ROM_SIZE=256*1024-36*1024
option FALLBACK_SIZE=ROM_SIZE
option DEFAULT_CONSOLE_LOGLEVEL = 9
option MAXIMUM_CONSOLE_LOGLEVEL = 9
# option DEFAULT_CONSOLE_LOGLEVEL = 4
# option MAXIMUM_CONSOLE_LOGLEVEL = 4
romimage "fallback"
option USE_FALLBACK_IMAGE=1
option ROM_IMAGE_SIZE=64*1024
option COREBOOT_EXTRA_VERSION=".0Fallback"
payload ../payload.elf
end
buildrom ./coreboot.rom ROM_SIZE "fallback"