a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
110 lines
2.5 KiB
C
110 lines
2.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Google Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/pci_ids.h>
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#include <device/pci_def.h>
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#include <delay.h>
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#include "pch.h"
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#define SPI_DELAY 10 /* 10us */
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#define SPI_RETRY 200000 /* 2s */
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static int early_spi_read_block(u32 offset, u8 size, u8 *buffer)
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{
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u32 *ptr32 = (u32*)buffer;
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u32 i;
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/* Clear status bits */
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RCBA16(SPIBAR_HSFS) |= SPIBAR_HSFS_AEL | SPIBAR_HSFS_FCERR |
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SPIBAR_HSFS_FDONE;
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if (RCBA16(SPIBAR_HSFS) & SPIBAR_HSFS_SCIP) {
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printk(BIOS_ERR, "SPI ERROR: transaction in progress\n");
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return -1;
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}
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/* Set flash address */
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RCBA32(SPIBAR_FADDR) = offset;
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/* Setup read transaction */
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RCBA16(SPIBAR_HSFC) = SPIBAR_HSFC_BYTE_COUNT(size) |
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SPIBAR_HSFC_CYCLE_READ;
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/* Start transactinon */
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RCBA16(SPIBAR_HSFC) |= SPIBAR_HSFC_GO;
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/* Wait for completion */
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for (i = 0; i < SPI_RETRY; i++) {
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if (RCBA16(SPIBAR_HSFS) & SPIBAR_HSFS_SCIP) {
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/* Cycle in progress, wait 1ms */
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udelay(SPI_DELAY);
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continue;
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}
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if (RCBA16(SPIBAR_HSFS) & SPIBAR_HSFS_AEL) {
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printk(BIOS_ERR, "SPI ERROR: Access Error\n");
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return -1;
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}
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if (RCBA16(SPIBAR_HSFS) & SPIBAR_HSFS_FCERR) {
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printk(BIOS_ERR, "SPI ERROR: Flash Cycle Error\n");
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return -1;
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}
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break;
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}
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if (i >= SPI_RETRY) {
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printk(BIOS_ERR, "SPI ERROR: Timeout\n");
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return -1;
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}
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/* Read the data */
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for (i = 0; i < size; i+=sizeof(u32)) {
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if (size-i >= 4) {
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/* reading >= dword */
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*ptr32++ = RCBA32(SPIBAR_FDATA(i/sizeof(u32)));
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} else {
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/* reading < dword */
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u8 j, *ptr8 = (u8*)ptr32;
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u32 temp = RCBA32(SPIBAR_FDATA(i/sizeof(u32)));
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for (j = 0; j < (size-i); j++) {
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*ptr8++ = temp & 0xff;
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temp >>= 8;
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}
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}
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}
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return size;
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}
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int early_spi_read(u32 offset, u32 size, u8 *buffer)
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{
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u32 current = 0;
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while (size > 0) {
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u8 count = (size < 64) ? size : 64;
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if (early_spi_read_block(offset + current, count,
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buffer + current) < 0)
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return -1;
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size -= count;
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current += count;
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}
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return 0;
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}
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