Matt Papageorge 0367c47eb0 vc/amd/fsp/cezanne: Add UPD fsp_owns_pcie_resets to FSP-M for Cezanne ... Update UPD to include option for FSP to de-assert PCIe reset GPIOs as specified in the DXIO descriptors. This change requires FSP version 1.0.4 revision 2 otherwise setting this value does affect any FSP behavior. BUG=b:199780346 TEST=Verify toggling this value is reflected in FSP Cq-Depend: chrome-internal:4170351 Change-Id: I0dee05fb0a650f026c2f09581117fa7fb5f6a90a Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58197 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2021-10-11 15:55:35 +00:00
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amd	vc/amd/fsp/cezanne: Add UPD fsp_owns_pcie_resets to FSP-M for Cezanne	2021-10-11 15:55:35 +00:00
cavium	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
eltan	src/vendorcode/eltan: Don't reference CONFIG_CBFS_SIZE	2021-07-28 08:19:30 +00:00
google	driver/i2c/max98390: add dsm_param_name	2021-09-14 02:35:41 +00:00
intel	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2374_01	2021-09-28 16:38:44 +00:00
mediatek	vc/mediatek/mt8195: fix misleading-indentation error	2021-10-08 03:41:37 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	soc/mediatek/mt8192: initialize DRAM using vendor reference code	2021-03-08 03:15:43 +00:00