coreboot-kgpe-d16/payloads/libpayload/arch
David Hendricks f7da3d2a94 libpayload: sync arch/arm/cache.c with coreboot
There was a recent patch by Deepa Dinamani applied to coreboot's
cache.c which fixed a bug that occurred when icache is on but dcache
is off ("arch: armv7: Fix cache sync instructions."). Although this
bug is not likely to be encountered by the time libpayload is run,
it's worth applying it to keep things in sync.

BUG=none
BRANCH=none
TEST=n/a since we have icache and dcache enabled on all ARM platforms
when libpayload is run.

Change-Id: I83d9f96acb702975585e5d47c90e2ddaca488f6d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 31f985b58ac9227684fbe27481129ba01fd3ab8a
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Change-Id: I4ab0d97ef3a97dcd0fa96e10273c3b32486e0b40
Original-Reviewed-on: https://chromium-review.googlesource.com/243276
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9737
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-17 09:27:42 +02:00
..
arm libpayload: sync arch/arm/cache.c with coreboot 2015-04-17 09:27:42 +02:00
arm64 libpayload arm64: Allow board to define upper address limit on DMA 2015-03-23 13:11:24 +01:00
mips libpayload: arch/mips: add virt/bus/phy_to_bus/phy/virt operations 2015-03-21 11:09:29 +01:00
x86 libpayload: move MRC processing to x86 path and remove ACPI_GNVS duplication 2015-03-20 15:33:47 +01:00
Config.in libpayload: arch/mips: Add basic MIPS architecture support 2015-03-21 11:07:50 +01:00