coreboot-kgpe-d16/src
David Wu eaab80efaf mb/google/fizz: Provide cros_gpio variant API
Add support for ChromeOS GPIO ACPI table information by providing weak

implementation from the baseboard.

BUG=b:117066935
BRANCH=Fizz
TEST=emerge-fizz coreboot

Change-Id: I2fa52c005cacdbcc322d107a3ac92d22df3f3697
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/28964
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-10-19 09:24:05 +00:00
..
acpi
arch arch/x86/exception: Improve the readability of a comment 2018-10-17 12:01:51 +00:00
commonlib commonlib/storage: Make pci sdhci code compile in romstage 2018-10-11 10:57:07 +00:00
console console: Set default loglevel to 8 (SPEW) for CONFIG_CHROMEOS 2018-10-18 12:50:41 +00:00
cpu {cpu,drivers}/amd: Replace MTRR addresses with macros 2018-10-19 09:20:22 +00:00
device Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00
drivers {cpu,drivers}/amd: Replace MTRR addresses with macros 2018-10-19 09:20:22 +00:00
ec ec/google/chromeec: Use common MEC interface 2018-10-18 15:01:40 +00:00
include cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
lib selfboot: remove bounce buffers 2018-10-11 17:42:41 +00:00
mainboard mb/google/fizz: Provide cros_gpio variant API 2018-10-19 09:24:05 +00:00
northbridge nb/intel/nehalem: Remove unneeded whitespace 2018-10-19 09:20:34 +00:00
security tpm/tspi: clean up tpm_setup function flow 2018-10-18 16:22:40 +00:00
soc soc/intel/cannonlake: Enable HDA driver support 2018-10-19 09:15:18 +00:00
southbridge src/{sb/intel,mb/google/auron}: Don't use device_t 2018-10-18 16:22:03 +00:00
superio superio/ite/it8721f: Add SuperIO ACPI declarations 2018-08-21 14:45:36 +00:00
vendorcode vc/google/chromeos/ec: remove EC hibernate in cr50 update path 2018-10-15 13:56:01 +00:00
Kconfig src/Kconfig: Drop a superfluous word 2018-10-01 15:28:47 +00:00