6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
35 lines
1.3 KiB
C
35 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/pci_ops.h>
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#include "haswell.h"
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void intel_northbridge_haswell_finalize_smm(void)
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{
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pci_or_config16(HOST_BRIDGE, 0x50, 1 << 0); /* GGC */
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pci_or_config32(HOST_BRIDGE, 0x5c, 1 << 0); /* DPR */
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pci_or_config32(HOST_BRIDGE, 0x78, 1 << 10); /* ME */
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pci_or_config32(HOST_BRIDGE, 0x90, 1 << 0); /* REMAPBASE */
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pci_or_config32(HOST_BRIDGE, 0x98, 1 << 0); /* REMAPLIMIT */
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pci_or_config32(HOST_BRIDGE, 0xa0, 1 << 0); /* TOM */
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pci_or_config32(HOST_BRIDGE, 0xa8, 1 << 0); /* TOUUD */
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pci_or_config32(HOST_BRIDGE, 0xb0, 1 << 0); /* BDSM */
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pci_or_config32(HOST_BRIDGE, 0xb4, 1 << 0); /* BGSM */
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pci_or_config32(HOST_BRIDGE, 0xb8, 1 << 0); /* TSEGMB */
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pci_or_config32(HOST_BRIDGE, 0xbc, 1 << 0); /* TOLUD */
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MCHBAR32_OR(MMIO_PAVP_MSG, 1 << 0); /* PAVP */
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MCHBAR32_OR(SAPMCTL, 1UL << 31); /* SA PM */
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MCHBAR32_OR(UMAGFXCTL, 1 << 0); /* UMA GFX */
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MCHBAR32_OR(VTDTRKLCK, 1 << 0); /* VTDTRK */
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MCHBAR32_OR(REQLIM, 1UL << 31);
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MCHBAR32_OR(DMIVCLIM, 1UL << 31);
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MCHBAR32_OR(CRDTLCK, 1 << 0);
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/* Memory Controller Lockdown */
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MCHBAR8(MC_LOCK) = 0x8f;
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/* Read+write the following */
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MCHBAR32(VDMBDFBARKVM) = MCHBAR32(VDMBDFBARKVM);
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MCHBAR32(VDMBDFBARPAVP) = MCHBAR32(VDMBDFBARPAVP);
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MCHBAR32(HDAUDRID) = MCHBAR32(HDAUDRID);
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}
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