4a8cd72c05
Change-Id: Ib45e93faebc2d24389f8739911419dfec437bd59 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40505 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
29 lines
716 B
C
29 lines
716 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* This file is part of the coreboot project. */
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/*
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* Utilities for SMM setup
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <amdblocks/acpimmio.h>
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#include <soc/southbridge.h>
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#include <soc/smi.h>
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void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
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{
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printk(BIOS_DEBUG, "%s STUB!!!\n", __func__);
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}
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/** Set the EOS bit and enable SMI generation from southbridge */
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void enable_smi_generation(void)
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{
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uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
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reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */
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reg |= SMITRG0_EOS; /* Set EOS bit */
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smi_write32(SMI_REG_SMITRIG0, reg);
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outb(APM_CNT_SMMINFO, APM_CNT);
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}
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