c36af7b00a
As build.h is an auto-generated file it was necessary to add it as an explicit prerequisite in the Makefiles. When this was forgotten abuild would sometimes fail with following error: fatal error: build.h: No such file or directory Fix this error by compiling version.c into all stages. Change-Id: I342f341077cc7496aed279b00baaa957aa2af0db Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7510 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
131 lines
3.6 KiB
C
131 lines
3.6 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <arch/io.h>
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#include <delay.h>
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#include <string.h>
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#include <device/pci_def.h>
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#include <device/pci_ops.h>
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#include <device/pci_ids.h>
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#include <arch/io.h>
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#include <arch/interrupt.h>
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#include <ec/lenovo/pmh7/pmh7.h>
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#include <ec/acpi/ec.h>
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#include <ec/lenovo/h8/h8.h>
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#include <northbridge/intel/i945/i945.h>
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#include <pc80/mc146818rtc.h>
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#include "dock.h"
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#include <arch/x86/include/arch/acpigen.h>
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#include <smbios.h>
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#include <version.h>
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#include <drivers/intel/gma/int15.h>
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#include "drivers/lenovo/lenovo.h"
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#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
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static acpi_cstate_t cst_entries[] = {
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{ 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
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{ 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
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{ 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
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};
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int get_cst_entries(acpi_cstate_t **entries)
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{
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*entries = cst_entries;
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return ARRAY_SIZE(cst_entries);
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}
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static void mainboard_init(device_t dev)
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{
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device_t dev0, idedev, sdhci_dev;
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ec_clr_bit(0x03, 2);
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if (inb(0x164c) & 0x08) {
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ec_set_bit(0x03, 2);
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ec_write(0x0c, 0x88);
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}
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install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3);
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/* If we're resuming from suspend, blink suspend LED */
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dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
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if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC)
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ec_write(0x0c, 0xc7);
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idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
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if (idedev && idedev->chip_info && dock_ultrabay_device_present()) {
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struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
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config->ide_enable_primary = 1;
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/* enable Ultrabay power */
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outb(inb(0x1628) | 0x01, 0x1628);
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ec_write(0x0c, 0x84);
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} else {
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/* disable Ultrabay power */
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outb(inb(0x1628) & ~0x01, 0x1628);
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ec_write(0x0c, 0x04);
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}
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/* Set SDHCI write protect polarity "SDWPPol" */
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sdhci_dev = dev_find_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C822, 0);
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if (sdhci_dev) {
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if (pci_read_config8(sdhci_dev, 0xfa) != 0x20) {
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/* unlock */
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pci_write_config8(sdhci_dev, 0xf9, 0xfc);
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/* set SDWPPol, keep CLKRUNDis, SDPWRPol clear */
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pci_write_config8(sdhci_dev, 0xfa, 0x20);
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/* restore lock */
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pci_write_config8(sdhci_dev, 0xf9, 0x00);
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}
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}
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}
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const char *smbios_mainboard_bios_version(void)
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{
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static char *s = NULL;
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/* Satisfy thinkpad_acpi. */
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if (strlen(CONFIG_LOCALVERSION))
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return "CBET4000 " CONFIG_LOCALVERSION;
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if (s != NULL)
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return s;
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s = strconcat("CBET4000 ", coreboot_version);
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return s;
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}
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static void fill_ssdt(void)
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{
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drivers_lenovo_serial_ports_ssdt_generate("\\_SB.PCI0.LPCB", 1);
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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dev->ops->acpi_fill_ssdt_generator = fill_ssdt;
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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