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Uwe Poeche ed309e58b0 soc/intel/fsp_baytrail: use designware I2C driver
Refactor I2C driver for fsp_baytrail to match the coreboot supported I2C
bus device structure. The internal I2C controllers are now handled by
the generic PCI driver approach and generic I2C access is enabled.
As orientation for the I2C code the actual solution from
soc/intel/apollolake I2C was taken. All the I2C specific parts were
removed from lpss.c and have been implemented in the I2C driver.
Future merge to soc/intel/common/block/i2c/i2c.c would be possible.

With this patch I2C chip devices can now be used in devicetree.

TEST=Booted siemens/tcu3 and verified that access to PTN3460 worked.

Change-Id: I3b87bd7c27e4c1afcce7cd4225cca02599f43c60
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2019-10-24 07:50:02 +00:00
3rdparty Update arm-trusted-firmware submodule to upstream master 2019-10-03 18:30:08 +00:00
Documentation Documentation: Add a technote section 2019-10-23 14:22:58 +00:00
configs configs: Build test CONFIG_BOOTSPLASH 2019-09-27 16:20:16 +00:00
payloads util/cbfstool: Add optional argument ibb 2019-10-18 15:37:37 +00:00
src soc/intel/fsp_baytrail: use designware I2C driver 2019-10-24 07:50:02 +00:00
util util/inteltool: Add server 5065x CPU model support 2019-10-22 12:56:20 +00:00
.checkpatch.conf .checkpatch.conf: Ignore a few more warnings 2018-08-13 12:23:24 +00:00
.clang-format lint/clang-format: set to 96 chars per line 2019-06-13 20:14:00 +00:00
.editorconfig Add .editorconfig file 2019-09-10 12:52:18 +00:00
.gitignore .gitignore: Add an exception for Kconfig.debug 2019-10-22 12:57:32 +00:00
.gitmodules 3rdparty/ffs: add open-power ffs utils 2019-08-25 07:37:11 +00:00
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AUTHORS Updated AUTHORS file for src/drivers 2019-10-22 12:55:27 +00:00
COPYING
MAINTAINERS MAINTAINERS: Add supermicro/x11-lga1151-series 2019-10-17 19:54:15 +00:00
Makefile Revert "site-local: Allow to read Makefile.inc w/o .config" 2019-10-08 05:54:30 +00:00
Makefile.inc build: Mark bootblock files on x86 as IBB 2019-10-18 15:38:19 +00:00
README.md README: Convert to Markdown 2018-09-16 13:01:58 +00:00
gnat.adc gnat.adc: Do not generate assertion code for Refined_Post 2016-10-29 01:33:31 +02:00
toolchain.inc Split MAYBE_STATIC to _BSS and _NONZERO variants 2019-08-26 20:56:29 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.