adc4753a8d
Currently this needlessly initializes the hardware in the both the romstage and the bootblock, but it works. Build option is renamed to USBDEBUG_IN_PRE_RAM to reflect the use better, related support files can be built to pre-ram stages regardless of usbdebug being enabled or not. Tested on Google/peppy (adapted to C_ENVIRONMENT_BOOTBLOCK). Change-Id: Ib77f2fc7f3d8fa524405601bae15cce9f76ffc6f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
112 lines
3.3 KiB
Text
112 lines
3.3 KiB
Text
# Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code.
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config HAVE_USBDEBUG
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bool
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default y if HAVE_USBDEBUG_OPTIONS
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default n
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# Use "select HAVE_USBDEBUG_OPTIONS" on southbridges with multiple
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# EHCI controllers or multiple ports with Debug Port capability
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config HAVE_USBDEBUG_OPTIONS
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def_bool n
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config USBDEBUG
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bool "USB 2.0 EHCI debug dongle support"
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default n
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depends on HAVE_USBDEBUG
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help
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This option allows you to use a so-called USB EHCI Debug device
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(such as the Ajays NET20DC, AMIDebug RX, or a system using the
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Linux "EHCI Debug Device gadget" driver found in recent kernel)
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to retrieve the coreboot debug messages (instead, or in addition
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to, a serial port).
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This feature is NOT supported on all chipsets in coreboot!
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It also requires a USB2 controller which supports the EHCI
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Debug Port capability.
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See https://www.coreboot.org/EHCI_Debug_Port for an up-to-date list
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of supported controllers.
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If unsure, say N.
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if USBDEBUG
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config USBDEBUG_IN_PRE_RAM
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bool "Enable early (pre-RAM) usbdebug"
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default y
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help
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Configuring USB controllers in system-agent binary may cause
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problems to usbdebug. Disabling this option delays usbdebug to
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be setup on entry to ramstage.
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If unsure, say Y.
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config USBDEBUG_HCD_INDEX
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int
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default 0
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prompt "Index for EHCI controller to use with usbdebug" if HAVE_USBDEBUG_OPTIONS
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help
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Some boards have multiple EHCI controllers with possibly only
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one having the Debug Port capability on an external USB port.
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Mapping of this index to PCI device functions is southbridge
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specific and mainboard level Kconfig should already provide
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a working default value here.
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config USBDEBUG_DEFAULT_PORT
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int
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default 0
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prompt "Default USB port to use as Debug Port" if HAVE_USBDEBUG_OPTIONS
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help
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Selects which physical USB port usbdebug dongle is connected to.
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Setting of 0 means to scan possible ports starting from 1.
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Intel platforms have hardwired the debug port location and this
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setting makes no difference there.
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Hence, if you select the correct port here, you can speed up
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your boot time. Which USB port number refers to which actual
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port on your mainboard (potentially also USB pin headers on
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your mainboard) is highly board-specific, and you'll likely
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have to find out by trial-and-error.
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choice
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prompt "Type of dongle"
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default USBDEBUG_DONGLE_STD
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config USBDEBUG_DONGLE_STD
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bool "USB gadget driver or Net20DC"
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help
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Net20DC, BeagleBone Black, Raspberry Pi Zero W
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config USBDEBUG_DONGLE_BEAGLEBONE
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bool "BeagleBone (not BeagleBone Black)"
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help
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Use this to configure the USB hub on BeagleBone board.
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Do NOT select this for the BeagleBone Black.
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config USBDEBUG_DONGLE_FTDI_FT232H
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bool "FTDI FT232H UART"
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help
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Use this with FT232H usb-to-uart. Configuration is hard-coded
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to use 8n1, no flow control.
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endchoice
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config USBDEBUG_DONGLE_FTDI_FT232H_BAUD
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int "FTDI FT232H baud rate"
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default 115200
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depends on USBDEBUG_DONGLE_FTDI_FT232H
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help
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Select baud rate for FT232H in the range 733..12,000,000. Make
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sure that your receiving side supports the same setting and your
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connection works with it. Multiples of 115,200 seem to be a good
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choice, and EHCI debug usually can't saturate more than 576,000.
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config USBDEBUG_OPTIONAL_HUB_PORT
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int
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default 2 if USBDEBUG_DONGLE_BEAGLEBONE
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default 0
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endif # USBDEBUG
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