coreboot-kgpe-d16/src/soc/intel
Derek Huang ed6bda2818 soc/intel/tgl: Add configurable value for ConfigTdpLevel
According to Tigerlake TDP specifications (doc #575683, table 4-2),
TGL supports different TDP levels depends on CPU segement/package,
IA Cores and graphics configuration. For example, UP3 4-Core GT2
suppots base TDP=28W, Configurable TDP-Down_1=15W and Configurable
TDP-Down_2=12W. This configurable value can be used to select
suitable TDP level

Change-Id: I4242575807caac172b6cbe667839bf6c9241f3c5
Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2021-02-03 20:11:06 +00:00
..
alderlake src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
apollolake src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
baytrail src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
braswell soc/intel/baytrail,braswell: Drop TOLM from GNVS 2021-02-02 14:50:38 +00:00
broadwell src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
cannonlake pci_ids/intel: Add missing CFL-S GT1 IGD IDs 2021-02-03 08:58:39 +00:00
common pci_ids/intel: Add missing CFL-S GT1 IGD IDs 2021-02-03 08:58:39 +00:00
denverton_ns soc/intel: Remove duplicate call to acpi_wake_source() 2021-01-29 19:35:25 +00:00
elkhartlake src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
icelake src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
jasperlake src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
quark arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits 2021-01-28 08:55:31 +00:00
skylake soc/intel/skylake/Kconfig: Remove duplicated INTEL_DESCRIPTOR_MODE_CAPABLE 2021-02-01 09:03:26 +00:00
tigerlake soc/intel/tgl: Add configurable value for ConfigTdpLevel 2021-02-03 20:11:06 +00:00
xeon_sp src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
Kconfig