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Timothy Pearson ee3ec8e212 southbridge/amd/sb700: Set up uninitialized devices in early boot
LPC decodes were not enabled, leading to a failure of POST 80 cards
and similar debugging devices.  Enable the relevant LPC decodes
to allow debugging.

Additionally, the SMBUS controllers were not properly set up.
Enable both the primary and auxiliary controllers.

Finally, K10 and higher CPUs were hanging during boot due to
a misconfigued IOAPIC.  Properly configure the IOAPIC.

Change-Id: I9ffb6542ce445ac971fb81f4f554e7f1313e6a98
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12177
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: build bot (Jenkins)
2015-10-25 05:05:46 +01:00
3rdparty cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFS 2015-10-16 02:41:37 +00:00
Documentation documentation: Add documentation for timestamp library 2015-08-07 18:00:07 +02:00
payloads libpayload: Add ptrdiff_t typedef 2015-10-20 16:50:25 +02:00
src southbridge/amd/sb700: Set up uninitialized devices in early boot 2015-10-25 05:05:46 +01:00
util util: Update makefiles for junit testing 2015-10-24 10:55:45 +02:00
.gitignore .gitignore: adapt to new buildgcc version 2015-09-28 20:05:14 +00:00
.gitmodules submodules: add arm-trusted-firmware third-party repository 2015-06-23 08:20:24 +02:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING
MAINTAINERS MAINTAINERS: Fix format for file entries (F:) 2015-10-22 20:20:48 +02:00
Makefile Add cscope/ctags generation for the current project 2015-07-30 05:21:28 +02:00
Makefile.inc util: add ectool, superiotool, and viatool to what-jenkins-does 2015-10-24 10:56:02 +02:00
README README: improve description of compiler requirements 2015-07-30 05:11:33 +02:00
toolchain.inc linking: add and use LDFLAGS_common 2015-09-09 19:35:54 +00:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.