c74b93df9f
It was originally inverse of romcc-built romstages on x86, and is currently always true on x86. Change-Id: I65fa6b3ce8a86781724bbf08f5eadee4112667c4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34806 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
292 lines
6.6 KiB
C
292 lines
6.6 KiB
C
/*
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* This file is part of the coreboot project.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _RULES_H
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#define _RULES_H
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/* Useful helpers to tell whether the code is executing in bootblock,
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* romstage, ramstage or SMM.
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*/
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#if defined(__DECOMPRESSOR__)
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#define ENV_DECOMPRESSOR 1
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#define ENV_BOOTBLOCK 0
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#define ENV_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "decompressor"
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#elif defined(__BOOTBLOCK__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 1
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#define ENV_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "bootblock"
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#elif defined(__ROMSTAGE__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_ROMSTAGE 1
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "romstage"
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#elif defined(__SMM__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 1
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#define ENV_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "smm"
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#elif defined(__VERSTAGE__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_VERSTAGE 1
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "verstage"
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#elif defined(__RAMSTAGE__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_ROMSTAGE 0
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#define ENV_RAMSTAGE 1
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#define ENV_SMM 0
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#define ENV_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "ramstage"
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#elif defined(__RMODULE__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_VERSTAGE 0
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#define ENV_RMODULE 1
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "rmodule"
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#elif defined(__POSTCAR__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 1
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#define ENV_LIBAGESA 0
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#define ENV_STRING "postcar"
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#elif defined(__LIBAGESA__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 1
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#define ENV_STRING "libagesa"
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#else
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/*
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* Default case of nothing set for random blob generation using
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* create_class_compiler that isn't bound to a stage.
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*/
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "UNKNOWN"
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#endif
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/* Define helpers about the current architecture, based on toolchain.inc. */
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#if defined(__ARCH_arm__)
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#define ENV_ARM 1
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#define ENV_ARM64 0
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#if __COREBOOT_ARM_ARCH__ == 4
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#define ENV_ARMV4 1
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#define ENV_ARMV7 0
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#elif __COREBOOT_ARM_ARCH__ == 7
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#define ENV_ARMV4 0
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#define ENV_ARMV7 1
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#if defined(__COREBOOT_ARM_V7_A__)
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#define ENV_ARMV7_A 1
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#define ENV_ARMV7_M 0
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#define ENV_ARMV7_R 0
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#elif defined(__COREBOOT_ARM_V7_M__)
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#define ENV_ARMV7_A 0
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#define ENV_ARMV7_M 1
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#define ENV_ARMV7_R 0
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#elif defined(__COREBOOT_ARM_V7_R__)
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#define ENV_ARMV7_A 0
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#define ENV_ARMV7_M 0
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#define ENV_ARMV7_R 1
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#endif
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#else
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#endif
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#define ENV_ARMV8 0
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#define ENV_MIPS 0
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#define ENV_RISCV 0
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#define ENV_X86 0
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#define ENV_X86_32 0
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#define ENV_X86_64 0
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#elif defined(__ARCH_arm64__)
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#define ENV_ARM 0
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#define ENV_ARM64 1
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#if __COREBOOT_ARM_ARCH__ == 8
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#define ENV_ARMV8 1
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#else
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#define ENV_ARMV8 0
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#endif
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#define ENV_MIPS 0
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#define ENV_RISCV 0
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#define ENV_X86 0
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#define ENV_X86_32 0
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#define ENV_X86_64 0
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#elif defined(__ARCH_mips__)
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#define ENV_ARM 0
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#define ENV_ARM64 0
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#define ENV_ARMV8 0
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#define ENV_MIPS 1
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#define ENV_RISCV 0
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#define ENV_X86 0
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#define ENV_X86_32 0
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#define ENV_X86_64 0
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#elif defined(__ARCH_riscv__)
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#define ENV_ARM 0
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#define ENV_ARM64 0
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#define ENV_ARMV8 0
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#define ENV_MIPS 0
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#define ENV_RISCV 1
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#define ENV_X86 0
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#define ENV_X86_32 0
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#define ENV_X86_64 0
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#elif defined(__ARCH_x86_32__)
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#define ENV_ARM 0
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#define ENV_ARM64 0
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#define ENV_ARMV8 0
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#define ENV_MIPS 0
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#define ENV_RISCV 0
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#define ENV_X86 1
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#define ENV_X86_32 1
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#define ENV_X86_64 0
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#elif defined(__ARCH_x86_64__)
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#define ENV_ARM 0
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#define ENV_ARM64 0
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#define ENV_ARMV8 0
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#define ENV_MIPS 0
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#define ENV_RISCV 0
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#define ENV_X86 1
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#define ENV_X86_32 0
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#define ENV_X86_64 1
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#else
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#define ENV_ARM 0
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#define ENV_ARM64 0
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#define ENV_ARMV8 0
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#define ENV_MIPS 0
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#define ENV_RISCV 0
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#define ENV_X86 0
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#define ENV_X86_32 0
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#define ENV_X86_64 0
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#endif
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#if CONFIG(RAMPAYLOAD)
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/* ENV_PAYLOAD_LOADER is set to ENV_POSTCAR when CONFIG_RAMPAYLOAD is enabled */
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#define ENV_PAYLOAD_LOADER ENV_POSTCAR
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#else
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/* ENV_PAYLOAD_LOADER is set when you are in a stage that loads the payload.
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* For now, that is the ramstage. */
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#define ENV_PAYLOAD_LOADER ENV_RAMSTAGE
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#endif
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/**
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* For pre-DRAM stages and post-CAR always build with simple device model, ie.
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* PCI, PNP and CPU functions operate without use of devicetree. The reason
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* post-CAR utilizes __SIMPLE_DEVICE__ is for simplicity. Currently there's
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* no known requirement that devicetree would be needed during that stage.
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*
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* For ramstage individual source file may define __SIMPLE_DEVICE__
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* before including any header files to force that particular source
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* be built with simple device model.
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*/
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#if (defined(__PRE_RAM__) || ENV_SMM || !ENV_PAYLOAD_LOADER)
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#define __SIMPLE_DEVICE__
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#endif
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/* x86 specific. Indicates that the current stage is running with cache-as-ram
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* enabled from the beginning of the stage in C code. */
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#if defined(__PRE_RAM__)
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#define ENV_CACHE_AS_RAM CONFIG(ARCH_X86)
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#else
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#define ENV_CACHE_AS_RAM 0
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#endif
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#endif /* _RULES_H */
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