Andrew Bresticker 9f5ad9b6d9 libpayload: mips: Use KSEG1 to access DMA-coherent memory ... Use bus_to_virt() to convert the physical address of the DMA coherent region to an address in KSEG1 which is suitable for device memory accesses. BUG=chrome-os-partner:36258 BRANCH=none TEST=Build and boot on Pistachio. Change-Id: If382feda66f6d829f8b3548ab263cf603cab2e9b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a88a175f6d6db81d3154fb5dd31a44363ab94653 Original-Change-Id: I9ad6435495df2c71d8f81a782f1c3dfcfd4aeb28 Original-Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/246696 Original-Reviewed-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/9818 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2015-04-21 08:12:29 +02:00
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arm	libpayload: sync arch/arm/cache.c with coreboot	2015-04-17 09:27:42 +02:00
arm64	libpayload arm64: Allow board to define upper address limit on DMA	2015-03-23 13:11:24 +01:00
mips	libpayload: mips: Use KSEG1 to access DMA-coherent memory	2015-04-21 08:12:29 +02:00
x86	libpayload: move MRC processing to x86 path and remove ACPI_GNVS duplication	2015-03-20 15:33:47 +01:00
Config.in	libpayload: arch/mips: Add basic MIPS architecture support	2015-03-21 11:07:50 +01:00