coreboot-kgpe-d16/src/soc/intel
Rizwan Qureshi 17335fab17 soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support
Add APIs and required parameters for creating Maxim 98927
and Realtek 5336 SSP endpoints in NHLT table.

BUG=chrome-os-partner:62051
BRANCH=None
TEST=check that NHLT table created is created properly

Change-Id: Ica302aab05c5364faf4923dc5327be8e8eaae8b4
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Signed-off-by: M Naveen <naveen.m@intel.com>
Reviewed-on: https://review.coreboot.org/18213
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-02-17 19:26:15 +01:00
..
apollolake soc/intel/apollolake: dump CSE status 2017-02-08 15:12:31 +01:00
baytrail google/rambi: add explicit pull-down for ram-id 2017-02-14 13:03:53 +01:00
braswell intel: Fix copy/paste error in license text 2017-01-16 12:57:05 +01:00
broadwell cpu/intel/common: Add/Use common function to set virtualization 2016-12-27 02:30:08 +01:00
common soc/intel/common: provide option to invalide MRC cache on recovery 2016-12-15 23:11:57 +01:00
fsp_baytrail fsp_baytrail: Enable graphic init per default 2017-01-13 17:42:26 +01:00
fsp_broadwell_de intel: Fix copy/paste error in license text 2017-01-16 12:57:05 +01:00
quark intel: Fix copy/paste error in license text 2017-01-16 12:57:05 +01:00
sch nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> 2017-01-06 18:15:03 +01:00
skylake soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob support 2017-02-17 19:26:15 +01:00