f35eee94bd
Removed mkhi_hdr structure definition from multiple SOCs, and moved to common. TEST=Built code for Hatch, apollolake boards. Change-Id: Ifeba0ed4d98975049179d1b47fb22c06a927dc29 Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35545 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
292 lines
6.8 KiB
C
292 lines
6.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Google, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/mmio.h>
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#include <bootstate.h>
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#include <commonlib/region.h>
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#include <console/console.h>
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#include <fmap.h>
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#include <intelblocks/cse.h>
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#include <intelblocks/p2sb.h>
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#include <intelblocks/pcr.h>
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#include <soc/heci.h>
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#include <soc/iomap.h>
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#include <soc/pcr_ids.h>
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#include <soc/pci_devs.h>
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#include <device/pci_ops.h>
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#include <stdint.h>
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#define MKHI_GROUP_ID_MCA 0x0a
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#define READ_FILE 0x02
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#define READ_FILE_FLAG_DEFAULT (1 << 0)
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#define READ_FILE_FLAG_HASH (1 << 1)
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#define READ_FILE_FLAG_EMULATED (1 << 2)
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#define READ_FILE_FLAG_HW (1 << 3)
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#define MKHI_GROUP_ID_GEN 0xff
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#define GET_FW_VERSION 0x02
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#define MCA_MAX_FILE_PATH_SIZE 64
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#define FUSE_LOCK_FILE "/fpf/intel/SocCfgLock"
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/* Status values are made in such a way erase is not needed */
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static enum fuse_flash_state {
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FUSE_FLASH_FUSED = 0xfc,
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FUSE_FLASH_UNFUSED = 0xfe,
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FUSE_FLASH_UNKNOWN = 0xff,
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} g_fuse_state;
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#define FPF_STATUS_FMAP "FPF_STATUS"
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/*
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* Read file from CSE internal filesystem.
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* size is maximum length of provided buffer buff, which is updated with actual
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* size of the file read. flags indicate whether real file or fuse is used.
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* Returns 1 on success and 0 otherwise.
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*/
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static int read_cse_file(const char *path, void *buff, size_t *size,
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size_t offset, uint32_t flags)
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{
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int res;
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size_t reply_size;
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struct mca_command {
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struct mkhi_hdr hdr;
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char file_name[MCA_MAX_FILE_PATH_SIZE];
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uint32_t offset;
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uint32_t data_size;
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uint8_t flags;
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} __packed msg;
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struct mca_response {
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struct mkhi_hdr hdr;
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uint32_t data_size;
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uint8_t buffer[128];
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} __packed rmsg;
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if (sizeof(rmsg.buffer) < *size) {
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printk(BIOS_ERR, "internal buffer is too small\n");
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return 0;
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}
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if (strnlen(path, sizeof(msg.file_name)) >= sizeof(msg.file_name)) {
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printk(BIOS_ERR, "path too big for msg.file_name buffer\n");
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return 0;
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}
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strncpy(msg.file_name, path, sizeof(msg.file_name));
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msg.hdr.group_id = MKHI_GROUP_ID_MCA;
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msg.hdr.command = READ_FILE;
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msg.flags = flags;
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msg.data_size = *size;
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msg.offset = offset;
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res = heci_send(&msg, sizeof(msg), BIOS_HOST_ADDR, HECI_MKHI_ADDR);
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if (!res) {
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printk(BIOS_ERR, "failed to send HECI message\n");
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return 0;
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}
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reply_size = sizeof(rmsg);
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res = heci_receive(&rmsg, &reply_size);
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if (!res) {
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printk(BIOS_ERR, "failed to receive HECI reply\n");
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return 0;
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}
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if (rmsg.data_size > *size) {
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printk(BIOS_ERR, "reply is too large\n");
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return 0;
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}
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memcpy(buff, rmsg.buffer, rmsg.data_size);
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*size = rmsg.data_size;
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return 1;
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}
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static enum fuse_flash_state load_cached_fpf(struct region_device *rdev)
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{
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enum fuse_flash_state state;
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uint8_t buff;
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state = FUSE_FLASH_UNKNOWN;
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if (rdev_readat(rdev, &buff, 0, sizeof(buff)) >= 0) {
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state = read8(&buff);
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return state;
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}
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printk(BIOS_WARNING, "failed to load cached FPF value\n");
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return state;
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}
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static
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int save_fpf_state(enum fuse_flash_state state, struct region_device *rdev)
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{
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uint8_t buff;
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write8(&buff, (uint8_t) state);
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return rdev_writeat(rdev, &buff, 0, sizeof(buff));
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}
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static void fpf_blown(void *unused)
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{
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uint8_t fuse;
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struct region_device rdev;
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size_t sz = sizeof(fuse);
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bool rdev_valid = false;
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if (fmap_locate_area_as_rdev_rw(FPF_STATUS_FMAP, &rdev) == 0) {
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rdev_valid = true;
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g_fuse_state = load_cached_fpf(&rdev);
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if (g_fuse_state != FUSE_FLASH_UNKNOWN)
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return;
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}
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if (!read_cse_file(FUSE_LOCK_FILE, &fuse, &sz, 0, READ_FILE_FLAG_HW))
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return;
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g_fuse_state = fuse == 1 ? FUSE_FLASH_FUSED : FUSE_FLASH_UNFUSED;
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if (rdev_valid && (save_fpf_state(g_fuse_state, &rdev) < 0))
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printk(BIOS_CRIT, "failed to save FPF state\n");
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}
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static uint32_t dump_status(int index, int reg_addr)
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{
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uint32_t reg;
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reg = me_read_config32(reg_addr);
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printk(BIOS_DEBUG, "CSE FWSTS%d: 0x%08x\n", index, reg);
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return reg;
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}
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static void dump_cse_version(void *unused)
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{
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int res;
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size_t reply_size;
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struct mkhi_hdr msg;
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struct version {
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uint16_t minor;
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uint16_t major;
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uint16_t build;
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uint16_t hotfix;
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} __packed;
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struct fw_version_response {
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struct mkhi_hdr hdr;
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struct version code;
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struct version nftp;
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struct version fitc;
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} __packed rsp;
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/*
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* Print ME version only if UART debugging is enabled. Else, it takes
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* ~0.6 second to talk to ME and get this information.
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*/
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if (!CONFIG(CONSOLE_SERIAL))
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return;
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msg.group_id = MKHI_GROUP_ID_GEN;
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msg.command = GET_FW_VERSION;
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res = heci_send(&msg, sizeof(msg), BIOS_HOST_ADDR, HECI_MKHI_ADDR);
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if (!res) {
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printk(BIOS_ERR, "Failed to send HECI message.\n");
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return;
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}
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reply_size = sizeof(rsp);
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res = heci_receive(&rsp, &reply_size);
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if (!res) {
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printk(BIOS_ERR, "Failed to receive HECI reply.\n");
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return;
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}
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if (rsp.hdr.result != 0) {
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printk(BIOS_ERR, "Failed to get ME version.\n");
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return;
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}
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printk(BIOS_DEBUG, "ME: Version: %d.%d.%d.%d\n", rsp.code.major,
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rsp.code.minor, rsp.code.hotfix, rsp.code.build);
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}
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static void dump_cse_state(void)
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{
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uint32_t fwsts1;
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if (!is_cse_enabled())
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return;
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fwsts1 = dump_status(1, PCI_ME_HFSTS1);
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dump_status(2, PCI_ME_HFSTS2);
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dump_status(3, PCI_ME_HFSTS3);
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dump_status(4, PCI_ME_HFSTS4);
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dump_status(5, PCI_ME_HFSTS5);
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dump_status(6, PCI_ME_HFSTS6);
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/* Minimal decoding is done here in order to call out most important
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pieces. Manufacturing mode needs to be locked down prior to shipping
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the product so it's called out explicitly. */
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printk(BIOS_DEBUG, "ME: Manufacturing Mode : %s\n",
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(fwsts1 & (1 << 0x4)) ? "YES" : "NO");
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printk(BIOS_DEBUG, "ME: FPF status : ");
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switch (g_fuse_state) {
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case FUSE_FLASH_UNFUSED:
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printk(BIOS_DEBUG, "unfused");
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break;
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case FUSE_FLASH_FUSED:
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printk(BIOS_DEBUG, "fused");
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break;
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default:
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case FUSE_FLASH_UNKNOWN:
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printk(BIOS_DEBUG, "unknown");
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}
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printk(BIOS_DEBUG, "\n");
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}
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#define PCR_PSFX_T0_SHDW_PCIEN 0x1C
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#define PCR_PSFX_T0_SHDW_PCIEN_FUNDIS (1 << 8)
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static void disable_heci1(void)
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{
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pcr_or32(PID_PSF3, PSF3_BASE_ADDRESS + PCR_PSFX_T0_SHDW_PCIEN,
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PCR_PSFX_T0_SHDW_PCIEN_FUNDIS);
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}
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void heci_cse_lockdown(void)
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{
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dump_cse_state();
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/*
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* It is safe to disable HECI1 now since we won't be talking to the ME
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* anymore.
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*/
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disable_heci1();
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}
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, fpf_blown, NULL);
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, dump_cse_version, NULL);
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