fa0080d187
All octopus board share the same power off sequence. Move to smihandler.c instead variant.c. BUG=b:168075958 BRANCH=octopus TEST=build image and verify on the DUT with LTE DB. Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I2be5a656fb42fff99c56d21aaa73ed9140caad37 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45436 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
87 lines
1.7 KiB
C
87 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi.h>
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#include <baseboard/variants.h>
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#include <cpu/x86/smm.h>
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#include <delay.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include <elog.h>
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#include <gpio.h>
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#include <intelblocks/smihandler.h>
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#include <soc/pm.h>
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#include <soc/gpio.h>
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#include <variant/ec.h>
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#include <variant/gpio.h>
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struct gpio_with_delay {
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gpio_t gpio;
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unsigned int delay_msecs;
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};
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void mainboard_smi_gpi_handler(const struct gpi_status *sts)
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{
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if (gpi_status_get(sts, EC_SMI_GPI))
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chromeec_smi_process_events();
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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const struct pad_config *pads;
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size_t num;
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pads = variant_sleep_gpio_table(&num, slp_typ);
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gpio_configure_pads(pads, num);
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variant_smi_sleep(slp_typ);
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chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
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MAINBOARD_EC_S5_WAKE_EVENTS);
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}
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int mainboard_smi_apmc(u8 apmc)
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{
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
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MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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void mainboard_smi_espi_handler(void)
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{
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chromeec_smi_process_events();
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}
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void elog_gsmi_cb_mainboard_log_wake_source(void)
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{
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google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS |
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MAINBOARD_EC_S0IX_WAKE_EVENTS);
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}
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void __weak variant_smi_sleep(u8 slp_typ)
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{
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/* Leave for the variant to implement if necessary. */
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}
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void power_off_lte_module(void)
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{
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const struct gpio_with_delay lte_power_off_gpios[] = {
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{
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GPIO_161, /* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
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30,
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},
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{
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GPIO_117, /* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */
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100
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},
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{
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GPIO_67, /* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
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0
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}
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};
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for (int i = 0; i < ARRAY_SIZE(lte_power_off_gpios); i++) {
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gpio_output(lte_power_off_gpios[i].gpio, 0);
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mdelay(lte_power_off_gpios[i].delay_msecs);
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}
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}
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