45 lines
915 B
Plaintext
45 lines
915 B
Plaintext
# abuild config file for EPIA-M
|
|
|
|
target via_epia-m
|
|
mainboard via/epia-m
|
|
|
|
option MAXIMUM_CONSOLE_LOGLEVEL=8
|
|
option DEFAULT_CONSOLE_LOGLEVEL=8
|
|
option CONFIG_CONSOLE_SERIAL8250=1
|
|
|
|
__COMPRESSION__
|
|
|
|
option ROM_SIZE=256*1024
|
|
|
|
option HAVE_OPTION_TABLE=1
|
|
option CONFIG_ROM_PAYLOAD=1
|
|
option HAVE_FALLBACK_BOOT=1
|
|
|
|
###
|
|
### Compute the location and size of where this firmware image
|
|
### (coreboot plus bootloader) will live in the boot rom chip.
|
|
###
|
|
option FALLBACK_SIZE=131072
|
|
|
|
## Coreboot C code runs at this location in RAM
|
|
option _RAMBASE=0x00004000
|
|
|
|
#
|
|
# Via EPIA M
|
|
#
|
|
romimage "normal"
|
|
option USE_FALLBACK_IMAGE=0
|
|
option ROM_IMAGE_SIZE=64*1024
|
|
option COREBOOT_EXTRA_VERSION=".0-Normal"
|
|
payload __PAYLOAD__
|
|
end
|
|
|
|
romimage "fallback"
|
|
option USE_FALLBACK_IMAGE=1
|
|
option ROM_IMAGE_SIZE=64*1024
|
|
option COREBOOT_EXTRA_VERSION=".0-Fallback"
|
|
payload __PAYLOAD__
|
|
end
|
|
|
|
buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
|