Jonathan Neuschäfer f2b4993b1d util/riscvtools: Rename to util/riscv/ ... There's no good reason to use the more complicated name. Change-Id: I515e2df3b87580ddd31d18fe63451a98e92ead61 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/25700 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2018-04-25 11:43:20 +00:00
..
acpi
arch	arch/x86: add ENV_CACHE_AS_RAM	2018-04-24 14:40:16 +00:00
commonlib	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
console	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
cpu	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
device	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
drivers	drivers/uart: Add a driver for SiFive's UART	2018-04-25 11:42:52 +00:00
ec	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
include	include/memory_info.h: Change part number field from 19 bytes to 21	2018-04-24 17:12:40 +00:00
lib	lib/ext_stage_cache: include prog arg in stage cache metadata	2018-04-24 14:39:36 +00:00
mainboard	util/riscvtools: Rename to util/riscv/	2018-04-25 11:43:20 +00:00
northbridge	vx900: Drop some unused defines	2018-04-25 11:43:04 +00:00
security	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
soc	soc/amd/common/block/pi/amd_late_init.c: Fix illegal memory access	2018-04-24 17:14:29 +00:00
southbridge	compiler.h: add __weak macro	2018-04-24 14:37:59 +00:00
superio	Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT	2018-01-15 23:25:12 +00:00
vendorcode	vendorcode/amd/pi/00670F00: Remove unused headers	2018-04-16 08:35:05 +00:00
Kconfig	Timestamps: Add option to print timestamps to debug console	2018-03-09 17:16:21 +00:00