coreboot-kgpe-d16/payloads/libpayload/arch/arm64/head.S
Furquan Shaikh 02efc9413b libpayload arm64: Initialize exception stack
Initialize exception stack to be able to handle exceptions properly

BUG=chrome-os-partner:31634
BRANCH=None
TEST=test_exc successfully generates and handles exceptions on ryu

Change-Id: I19163fae080b9ac3297a7ffe404446e427bf9a1c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 99157687c5178c3b3eb79f5589343db1b2b4cc86
Original-Change-Id: I4dc83ff32c1665e22127bf0b1e6d4c6b45c07a4a
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/214608
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8782
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21 13:35:33 +01:00

67 lines
1.9 KiB
ArmAsm

/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <arch/asm.h>
/*
* Our entry point
*/
ENTRY(_entry)
/* Save off the location of the coreboot tables */
ldr x1, 1f
str x0, [x1]
/* Setup exception stack */
ldr x1, 3f
msr SPSel, #1
isb
mov sp, x1
/* Setup new stack */
ldr x1, 2f
msr SPSel, #0
isb
mov sp, x1
/* Let's rock. */
bl start_main
ret
ENDPROC(_entry)
.align 4
1:
.quad cb_header_ptr
2:
.quad _stack
3:
.quad _exc_stack