4dba4975b4
SPD data needs to remain within same chip -block with device 0:18.2. Change-Id: Ic12481b637ee5f5119faec3239b477f613e4e511 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31271 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
61 lines
2 KiB
Text
61 lines
2 KiB
Text
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2013 Advanced Micro Devices, Inc.
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# Copyright (C) 2015 Kyösti Mälkki <kyosti.malkki@gmail.com>
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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chip northbridge/amd/pi/00730F01/root_complex
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device cpu_cluster 0 on
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chip cpu/amd/pi/00730F01
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device lapic 0 on end
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end
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end
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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chip northbridge/amd/pi/00730F01
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device pci 0.0 on end # Root Complex
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device pci 0.2 off end # IOMMU
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device pci 1.0 on end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 on end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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device pci 2.1 on end # x4 PCIe slot
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device pci 2.2 on end # mPCIe slot
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device pci 2.3 on end # Realtek NIC
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device pci 2.4 off end # Edge Connector
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device pci 2.5 off end # Edge Connector
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device pci 8.0 off end # Platform Security Processor
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end #chip northbridge/amd/pi/00730F01
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chip southbridge/amd/pi/hudson
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device pci 10.0 on end # XHCI HC0
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device pci 11.0 on end # SATA
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device pci 12.0 on end # EHCI #0
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device pci 13.0 on end # EHCI #1
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device pci 14.0 on end # SMBus
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device pci 14.2 on end # HDA 0x4383
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device pci 14.3 on end # LPC 0x439d
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device pci 14.7 on end # SD
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device pci 16.0 on end # EHCI #2
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register "sd_mode" = "3"
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end #chip southbridge/amd/pi/hudson
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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device pci 18.4 on end
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device pci 18.5 on end
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end #domain
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end #northbridge/amd/pi/00730F01/root_complex
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