f3f36faf35
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I89b10076e0f4a4b3acd59160fb7abe349b228321 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39611 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
191 lines
5.1 KiB
Text
191 lines
5.1 KiB
Text
##
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## This file is part of the coreboot project.
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##
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config SOUTHBRIDGE_AMD_AGESA_HUDSON
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bool
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config SOUTHBRIDGE_AMD_AGESA_YANGTZE
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bool
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if SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE
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config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
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def_bool y
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select IOAPIC
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_CF9_RESET
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select HAVE_CF9_RESET_PREPARE
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select SOC_AMD_COMMON
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select SOC_AMD_COMMON_BLOCK
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select SOC_AMD_COMMON_BLOCK_ACPIMMIO
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config EHCI_BAR
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hex
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default 0xfef00000
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config HUDSON_XHCI_ENABLE
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bool "Enable Hudson XHCI Controller"
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default y if HUDSON_XHCI_FWM
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help
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The XHCI controller must be enabled and the XHCI firmware
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must be added in order to have USB 3.0 support configured
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by coreboot. The OS will be responsible for enabling the XHCI
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controller if the XHCI firmware is available but the
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XHCI controller is not enabled by coreboot.
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config HUDSON_XHCI_FWM
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bool "Add xhci firmware"
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default y if USE_BLOBS
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help
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Add Hudson 2/3/4 XHCI Firmware to support the onboard USB 3.0
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config HUDSON_IMC_ENABLE
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bool
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default n
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config HUDSON_IMC_FWM
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bool "Add IMC firmware"
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depends on HUDSON_IMC_ENABLE
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default y if USE_BLOBS
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select SPI_FLASH_HAS_VOLATILE_GROUP if SPI_FLASH
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help
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Add Hudson 2/3/4 IMC Firmware to support the onboard fan control
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config HUDSON_GEC_FWM
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bool
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default n
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help
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Add Hudson 2/3/4 GEC Firmware to support the onboard gigabit Ethernet MAC.
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Must be connected to a Broadcom B50610 or B50610M PHY on the motherboard.
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config HUDSON_XHCI_FWM_FILE
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string "XHCI firmware path and filename"
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default "3rdparty/blobs/southbridge/amd/hudson/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
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default "3rdparty/blobs/southbridge/amd/yangtze/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
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depends on HUDSON_XHCI_FWM
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config HUDSON_IMC_FWM_FILE
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string "IMC firmware path and filename"
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default "3rdparty/blobs/southbridge/amd/hudson/imc.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
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default "3rdparty/blobs/southbridge/amd/yangtze/imc.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
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depends on HUDSON_IMC_FWM
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config HUDSON_GEC_FWM_FILE
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string "GEC firmware path and filename"
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default "3rdparty/blobs/southbridge/amd/hudson/gec.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
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default "3rdparty/blobs/southbridge/amd/yangtze/gec.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
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depends on HUDSON_GEC_FWM
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config HUDSON_SATA_MODE
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int "SATA Mode"
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default 2
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range 0 6
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help
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Select the mode in which SATA should be driven. NATIVE AHCI, or RAID.
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The default is NATIVE.
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0: NATIVE mode does not require a ROM.
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1: RAID mode must have the two ROM files.
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2: AHCI may work with or without AHCI ROM. It depends on the payload support.
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For example, seabios does not require the AHCI ROM.
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3: LEGACY IDE
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4: IDE to AHCI
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5: AHCI7804: ROM Required, and AMD driver required in the OS.
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6: IDE to AHCI7804: ROM Required, and AMD driver required in the OS.
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comment "NATIVE"
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depends on HUDSON_SATA_MODE = 0
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comment "RAID"
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depends on HUDSON_SATA_MODE = 1
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comment "AHCI"
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depends on HUDSON_SATA_MODE = 2
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comment "LEGACY IDE"
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depends on HUDSON_SATA_MODE = 3
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comment "IDE to AHCI"
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depends on HUDSON_SATA_MODE = 4
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comment "AHCI7804"
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depends on HUDSON_SATA_MODE = 5
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comment "IDE to AHCI7804"
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depends on HUDSON_SATA_MODE = 6
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if HUDSON_SATA_MODE = 2 || HUDSON_SATA_MODE = 5
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config AHCI_ROM_ID
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string "AHCI device PCI IDs"
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default "1022,7801" if HUDSON_SATA_MODE = 2
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default "1022,7804" if HUDSON_SATA_MODE = 5
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config HUDSON_AHCI_ROM
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bool "Add a AHCI ROM"
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config AHCI_ROM_FILE
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string "AHCI ROM path and filename"
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depends on HUDSON_AHCI_ROM
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default "src/southbridge/amd/agesa/hudson/ahci.bin"
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endif
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if HUDSON_SATA_MODE = 1
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config RAID_ROM_ID
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string "RAID device PCI IDs"
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default "1022,7802"
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help
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1022,7802 for SATA NON-RAID5 module, 1022,7803 for SATA RAID5 mode
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config RAID_ROM_FILE
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string "RAID ROM path and filename"
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default "src/southbridge/amd/agesa/hudson/raid.bin"
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config RAID_MISC_ROM_FILE
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string "RAID Misc ROM path and filename"
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default "src/southbridge/amd/agesa/hudson/misc.bin"
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config RAID_MISC_ROM_POSITION
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hex "RAID Misc ROM Position"
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default 0xFFF00000
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help
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The RAID ROM requires that the MISC ROM is located between the range
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0xFFF0_0000 to 0xFFF0_FFFF. Also, it must 1K bytes aligned.
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The CONFIG_ROM_SIZE must be larger than 0x100000.
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endif
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config HUDSON_LEGACY_FREE
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bool "System is legacy free"
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help
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Select y if there is no keyboard controller in the system.
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This sets variables in AGESA and ACPI.
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config ACPI_ENABLE_THERMAL_ZONE
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bool
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default y
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endif # SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE
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if SOUTHBRIDGE_AMD_AGESA_YANGTZE
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config AZ_PIN
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hex
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default 0xaa
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help
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bit 1,0 - pin 0
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bit 3,2 - pin 1
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bit 5,4 - pin 2
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bit 7,6 - pin 3
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endif
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