coreboot-kgpe-d16/src/soc
Lee Leahy f45eb062da skylake: SPI code cleanup
Move base address into iomap.h.  Use PCI symbols instead of SPI specific
symbols.  Fix comments.

BRANCH=none
BUG=chrome-os-partner:44827
TEST=Build and run on kunimitsu

Change-Id: Id5d21603150b52fd1b71dd448105938bd6aff1a9
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: http://review.coreboot.org/11826
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-11 23:57:53 +00:00
..
broadcom/cygnus broadcom/cygnus: remove verstage.c 2015-10-02 12:16:21 +00:00
imgtec/pistachio linking: link bootblock.elf with .data and .bss sections again 2015-09-22 21:22:44 +00:00
intel skylake: SPI code cleanup 2015-10-11 23:57:53 +00:00
marvell/bg4cd linking: link bootblock.elf with .data and .bss sections again 2015-09-22 21:22:44 +00:00
nvidia tegra132: increase romstage size for vboot 2015-10-11 23:56:32 +00:00
qualcomm/ipq806x linking: link bootblock.elf with .data and .bss sections again 2015-09-22 21:22:44 +00:00
rockchip/rk3288 linking: link bootblock.elf with .data and .bss sections again 2015-09-22 21:22:44 +00:00
samsung linking: link bootblock.elf with .data and .bss sections again 2015-09-22 21:22:44 +00:00
ucb/riscv Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00