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Patrick Georgi f537407e5a Fix the generic code for copying and running coreboot_ram in case
certain configuration options are disabled. The strings were just
at the wrong place.

Two boards fix up some variables for romstream. This isn't necessary (or
possible) when CBFS is active, as there is no romstream. It would be
nicer to have them depend on CONFIG_ROM_PAYLOAD, but there isn't any
invariant that forces that to be inactive if CBFS is active, and this
patch is supposed to be small, esp. as the stream loaders are on the way
out.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4494 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-05 10:48:43 +00:00
documentation This patch unifies the use of config options in v2 to all start with CONFIG_ 2009-06-30 15:17:49 +00:00
payloads oops, these two were missed in the last cleanup. 2009-07-31 14:45:41 +00:00
src Fix the generic code for copying and running coreboot_ram in case 2009-08-05 10:48:43 +00:00
targets Add pci_rawops.h from the mailing list and fix the via/epia-m700 build. 2009-07-07 17:54:26 +00:00
util drop dead nested assignment (trivial) 2009-07-26 15:11:53 +00:00
COPYING
NEWS
README Improvements for the coreboot v2 README: 2009-04-17 17:11:39 +00:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary
BIOS you can find in most of today's computers.

It performs just a little bit of hardware initialization and then executes
one of many possible payloads, e.g. a Linux kernel or a bootloader.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make
 * python
 * perl

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Documentation for details.


Testing coreboot Without Modifying Your Hardware
-------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files (mostly those derived from the Linux kernel) are licensed under
the "GPL, version 2". For some parts, which were derived from other projects,
other (GPL-compatible) licenses may apply. Please check the individual
source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.