152e5a03a1
When CONFIG_LP_TIMER_RDTSC is enabled honor the TSC information exported in the coreboot tables as the cpu_khz frequency. That allows get_cpu_speed() not to be called which currently relies on the 8254 PIT. As certain x86 platforms allow that device to be optional or turned off for power saving reasons, allow a path where get_cpu_speed() is no longer called. Additionally, this approach also allows the libpayload to not duplicate logic that already exists in coreboot. BUG=chrome-os-partner:50214 BRANCH=glados TEST=Confirmed in payload TSC frequency is honored instead of using get_cpu_speed(). Change-Id: Ib8993afdfb49065d43de705d6dbbdb9174b6f2c4 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13671 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Andrey Petrov <andrey.petrov@intel.com> |
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.. | ||
arm/arch | ||
arm64/arch | ||
arpa | ||
mips/arch | ||
pci | ||
storage | ||
sys | ||
udc | ||
usb | ||
x86/arch | ||
archive.h | ||
assert.h | ||
cbfs.h | ||
cbfs_core.h | ||
cbfs_ram.h | ||
cbgfx.h | ||
coreboot_tables.h | ||
ctype.h | ||
die.h | ||
endian.h | ||
errno.h | ||
exception.h | ||
fmap_serialized.h | ||
gdb.h | ||
getopt.h | ||
inttypes.h | ||
ipchksum.h | ||
kconfig.h | ||
keycodes.h | ||
libpayload.h | ||
limits.h | ||
lz4.h | ||
lzma.h | ||
malloc.h | ||
multiboot_tables.h | ||
panel.h | ||
pci.h | ||
queue.h | ||
stdarg.h | ||
stddef.h | ||
stdint.h | ||
stdio.h | ||
stdlib.h | ||
string.h | ||
strings.h | ||
swab.h | ||
sysinfo.h | ||
term.h | ||
unistd.h | ||
video_console.h |