coreboot-kgpe-d16/util/nvramtool
Patrick Rudolph 4f5bed5210 cbfs: Rename CBFS_TYPE_PAYLOAD to CBFS_TYPE_SELF
In preparation of having FIT payloads, which aren't converted to simple ELF,
rename the CBFS type payload to actually show the format the payload is
encoded in.

Another type CBFS_TYPE_FIT will be added to have two different payload
formats. For now this is only a cosmetic change.

Change-Id: I39ee590d063b3e90f6153fe655aa50e58d45e8b0
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-05-04 10:30:24 +00:00
..
accessors nvramtool: Fix build with OpenBSD 2018-04-16 22:18:26 +00:00
cli Use www.coreboot.org over coreboot.org 2017-06-07 12:05:44 +02:00
COPYING
ChangeLog
DISCLAIMER
Makefile nvramtool: Fix build with OpenBSD 2018-04-16 22:18:26 +00:00
Makefile.inc
README
cbfs.c
cbfs.h cbfs: Rename CBFS_TYPE_PAYLOAD to CBFS_TYPE_SELF 2018-05-04 10:30:24 +00:00
cmos_lowlevel.c
cmos_lowlevel.h
cmos_ops.c util: change coreboot to lowercase 2017-06-27 18:26:01 +00:00
cmos_ops.h
common.c
common.h
compute_ip_checksum.c
coreboot_tables.h
hexdump.c
hexdump.h
input_file.c
input_file.h
ip_checksum.h
layout.c
layout.h
lbtable.c util: change coreboot to lowercase 2017-06-27 18:26:01 +00:00
lbtable.h
nvramtool.spec
reg_expr.c
reg_expr.h
win32mmap.c

README

Summary of Operation
--------------------
nvramtool is a utility for reading/writing coreboot parameters and
displaying information from the coreboot table.  It is intended for x86-based
systems (both 32-bit and 64-bit) that use coreboot.

The coreboot table resides in low physical memory, and may be accessed
through the /dev/mem interface.  It is created at boot time by coreboot, and
contains various system information such as the type of mainboard in use.  It
specifies locations in the CMOS (nonvolatile RAM) where the coreboot
parameters are stored.

For information about coreboot, see https://www.coreboot.org/.

Ideas for Future Improvements
-----------------------------
1.  Move the core functionality of this program into a shared library.
2.  Consider adding options for displaying other BIOS-provided information
    such as the MP table, ACPI table, PCI IRQ routing table, etc.