fdd47ef1e6
Image Slot Header (ISH) is a new feature.
The rom layout for A/B recovery with ISH:
EFS -> PSP L1 0x48 -> ISH A -> PSP L2 A -> BIOS L2 A
0x4A -> ISH B -> PSP L2 B -> BIOS L2 B
The newer 55758 will updated about the boot priority and update retry
in ISH header.
Change-Id: Ib0690cde1dce949514c7aacebe13096b7814ceff
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57747
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
30 lines
575 B
Makefile
30 lines
575 B
Makefile
# SPDX-License-Identifier: BSD-3-Clause
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HOSTCC ?= cc
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SRC = amdfwtool.c data_parse.c
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OBJ = $(SRC:%.c=%.o)
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TARGET = amdfwtool
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WERROR=-Werror
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CFLAGS=-O2 -Wall -Wextra -Wshadow ${WERROR}
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all: $(TARGET)
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$(TARGET): $(OBJ)
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$(CC) $(OBJ) $(LDFLAGS) -o $@
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%.o: %.c $(HEADER)
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$(CC) $(CFLAGS) -c -o $@ $<
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clean:
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@rm -f $(TARGET) $(OBJ)
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distclean: clean
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help:
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@echo "${TARGET}: Create AMD Firmware combination"
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@echo "Targets: all, clean, distclean, help"
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@echo "To disable warnings as errors, run make as:"
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@echo " make all WERROR=\"\""
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.PHONY: all clean distclean help
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