31b7ee4201
The code in coreboot is actually for the Arrandale processors, which are a MCM (Multi-Chip Module) with two different dies: - Hillel: 32nm Westmere dual-core CPU - Ironlake: 45nm northbridge with integrated graphics This has nothing to do with the older, single-die Nehalem processors. Therefore, replace the references to Nehalem with the correct names. Change-Id: I8c10a2618c519d2411211b9b8f66d24f0018f908 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38942 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| .. | ||
| board-status.html | ||
| Dockerfile | ||
| README.md | ||
| kconfig2html | ||
| run.sh | ||
README.md
Docker container to create coreboot status reports
This container expects input in /data-in/{coreboot,board-status}.git and
emits two files /data-out/{board-status.html,kconfig-options.html}.