coreboot-kgpe-d16/src/mainboard/kontron/kt690/Kconfig
Uwe Hermann d351925446 Move "select CACHE_AS_RAM" lines from boards into CPU socket.
All K8/Fam10h boards use CAR, so move the "select CACHE_AS_RAM"
into the socket directories, and remove it from the individual boards.

Do the same for Intel CPUs/sockets where all boards use CAR.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-08 08:22:04 +00:00

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1.2 KiB
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if BOARD_KONTRON_KT690
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
select CPU_AMD_SOCKET_S1G1
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_AMD_RS690
select SOUTHBRIDGE_AMD_SB600
select SUPERIO_WINBOND_W83627DHG
select BOARD_HAS_FADT
select HAVE_OPTION_TABLE
select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_MAINBOARD_RESOURCES
select GFXUMA
select HAVE_HARD_RESET
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_1024
select RAMINIT_SYSINFO
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select QRANK_DIMM_SUPPORT
select SET_FIDVID
config MAINBOARD_DIR
string
default kontron/kt690
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
hex
default 0x1488
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
hex
default 0x6900
config APIC_ID_OFFSET
hex
default 0x0
config MAINBOARD_PART_NUMBER
string
default "KT690/mITX"
config HEAP_SIZE
hex
default 0x8000
config MAX_CPUS
int
default 2
config MAX_PHYSICAL_CPUS
int
default 1
config SB_HT_CHAIN_ON_BUS0
int
default 1
config HT_CHAIN_END_UNITID_BASE
hex
default 0x1
config HT_CHAIN_UNITID_BASE
hex
default 0x0
config IRQ_SLOT_COUNT
int
default 11
endif # BOARD_KONTRON_KT690