Jimmy Zhang fff922bd14 rush: Enable dp display ... Add dp/sor supporting functions to enable dp panel. BUG=chrome-os-partner:34336 BRANCH=none TEST=build rush and ryu Change-Id: I1cc5a95ef5e3ea7cc701c1cb124a7eb5a5dbd872 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 795a7cddd36bd783cfdd6f1d3f7092bf48ebd8e7 Original-Change-Id: I336336dbbc5a772eec19ba96db8e7b50f6ea1497 Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/238945 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9616 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2015-04-14 09:05:00 +02:00
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arch	arm: Fix checkstack() to use correct stack size	2015-04-14 09:04:04 +02:00
console	New mechanism to define SRAM/memory map with automatic bounds checking	2015-04-06 22:05:01 +02:00
cpu	CBFS: Automate ROM image layout and remove hardcoded offsets	2015-04-14 09:01:27 +02:00
device	cbfs: correct types used for accessing files	2015-04-01 22:51:10 +02:00
drivers	tpm: Only expose base address Kconfig option when enabled	2015-04-13 17:33:24 +02:00
ec	chromeec: Fix printf formatting warning	2015-04-14 09:01:03 +02:00
include	timestamps: You can never have enough of them!	2015-04-14 09:03:40 +02:00
lib	arm: Fix checkstack() to use correct stack size	2015-04-14 09:04:04 +02:00
mainboard	rush: Configure display related clock, pad, and power	2015-04-14 09:04:29 +02:00
northbridge	northbridge/amd/agesa/familyXY: Make NULL device op explicit	2015-04-09 19:34:22 +02:00
soc	rush: Enable dp display	2015-04-14 09:05:00 +02:00
southbridge	southbridge/intel/fsp_rangeley/ : Spellcheck + Formatting	2015-04-10 17:57:11 +02:00
superio	kconfig: drop intermittend forwarder files	2015-04-07 17:40:28 +02:00
vendorcode	timestamps: You can never have enough of them!	2015-04-14 09:03:40 +02:00
Kconfig	CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstool	2015-04-14 09:01:23 +02:00