GNUBoot/coreboot-kgpe-d16
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Subrata Banik 98376b8459 soc/intel/cannonlake: Select common XHCI code 
This patch select CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI to include
common xhci code block.

BUG=b:78109109
BRANCH=none
TEST=Build and boot cnlrvp

Change-Id: I7f1e59792159dae5835fbbe7fcb1604fc01893ba
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/26465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-27 01:48:21 +00:00
..
acpi
arch src: Add space after 'while' 2018-05-24 12:17:31 +00:00
commonlib Introduce bootblock self-decompression 2018-05-22 02:44:14 +00:00
console Introduce bootblock self-decompression 2018-05-22 02:44:14 +00:00
cpu Remove leftover Intel CPU support 2018-05-24 17:23:41 +00:00
device device: Move find_dev_path() to device_const.c 2018-05-25 02:45:17 +00:00
drivers elog: Only log POST code from previous boot on non-S3 resume 2018-05-25 16:40:41 +00:00
ec src: Remove space after defined 2018-05-24 12:16:59 +00:00
include elog: Allow calling boot_count_read() without CONFIG_ELOG_BOOT_COUNT 2018-05-25 16:40:08 +00:00
lib Introduce bootblock self-decompression 2018-05-22 02:44:14 +00:00
mainboard grunt: Wire up the EC SMI handler 2018-05-27 01:04:39 +00:00
northbridge nb/intel/fsp_sandybridge: Fix lost const qualifier on 'device_t' 2018-05-24 18:08:41 +00:00
security security/vboot: Remove redundent _verstage/_everstage/_verstage_size symbols 2018-05-14 16:24:28 +00:00
soc soc/intel/cannonlake: Select common XHCI code 2018-05-27 01:48:21 +00:00
southbridge sb/intel/common/pirq_gen: Rework generating pin-route tables 2018-05-25 20:32:58 +00:00
superio superio/ite/it8720f: Implement power control 2018-05-15 11:47:14 +00:00
vendorcode Remove leftover AMD CIMX RD890 vendorcode 2018-05-24 13:21:32 +00:00
Kconfig Introduce bootblock self-decompression 2018-05-22 02:44:14 +00:00