coreboot-kgpe-d16/src
Michael Niewöhner fb7a06b5b7 mb/supermicro/x11ssm-f: enable LTR for all root ports
Follow vendor and enable LTR on all root ports to optimize for devices'
latency requirements and also optimize power management while preventing
failure due to wrongly guessing idle states, which happens without LTR.

Tested successfully. No errors show up in dmesg.

Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I8f72087c71e291d2412dc7b3e16ee7f419e2ca0c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48367
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-10 02:27:08 +00:00
..
acpi cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
arch coreboot tables: Add SPI flash memory map windows to coreboot tables 2020-12-08 22:56:09 +00:00
commonlib coreboot tables: Add SPI flash memory map windows to coreboot tables 2020-12-08 22:56:09 +00:00
console lib/trace: Remove TRACE support 2020-12-02 23:35:58 +00:00
cpu cpu/x86/64bit: Add code to call function in protected mode 2020-12-05 08:19:17 +00:00
device device: Drop unused HyperTransport code 2020-11-25 09:11:46 +00:00
drivers coreboot tables: Add SPI flash memory map windows to coreboot tables 2020-12-08 22:56:09 +00:00
ec src: Remove redundant use of ACPI offset(0) 2020-12-03 00:05:52 +00:00
include coreboot tables: Add SPI flash memory map windows to coreboot tables 2020-12-08 22:56:09 +00:00
lib cbfs: Allow mcache to be found after the first lookup 2020-12-09 17:44:52 +00:00
mainboard mb/supermicro/x11ssm-f: enable LTR for all root ports 2020-12-10 02:27:08 +00:00
northbridge nb/intel/ironlake: Introduce memmap.h 2020-12-07 15:58:55 +00:00
security cbfs: Add verification for RO CBFS metadata hash 2020-12-03 00:11:08 +00:00
soc soc/amd/picasso/reset: use port and bit defines from cf9_reset.h 2020-12-10 01:22:06 +00:00
southbridge sb/intel/common: Modify CONFIG_LOCK_MANAGEMENT_ENGINE behavior 2020-12-07 14:06:28 +00:00
superio src: Remove redundant use of ACPI offset(0) 2020-12-03 00:05:52 +00:00
vendorcode vc/intel/fsp/fsp2_0/cooperlake_sp: Update WW47 FSP Memory map HOB 2020-12-07 10:30:09 +00:00
Kconfig lib/trace: Remove TRACE support 2020-12-02 23:35:58 +00:00